Abstract The arithmetic power of a quantum computer is determined by a combination of the number of quantum bits and the fidelity of a single bit. Superconducting quantum chips can be prepared using a process similar to that of semiconductor chips, and are therefore of interest because of their natural advantages in terms of scalability. However, as the number of quantum bits increases, the z-control lines (magnetic field control lines) on the superconducting quantum chip also increase, leading to increased magnetic field crosstalk between individual control lines, which affects the fidelity of a single bit and further affects the arithmetic power of superconducting quantum computing. To address the above problems, this paper proposes two methods to reduce the magnetic field crosstalk between the control lines by modeling and simulating the superconducting quantum chip using air bridges and inflow structures, and the simulation results show that the magnetic field crosstalk between the control lines is significantly improved after the introduction of air bridges and inflow structures. This work provides a basis for further suppression of magnetic field crosstalk between the z-control lines of superconducting quantum chips.
Abstract The arithmetic power of a quantum computer is determined by a combination of the number of quantum bits and the fidelity of a single bit. Superconducting quantum chips can be prepared using a process similar to that of semiconductor chips, and are therefore of interest because of their natural advantages in terms of scalability. However, as the number of quantum bits increases, the z-control lines (magnetic field control lines) on the superconducting quantum chip also increase, leading to increased magnetic field crosstalk between individual control lines, which affects the fidelity of a single bit and further affects the arithmetic power of superconducting quantum computing. To address the above problems, this paper proposes two methods to reduce the magnetic field crosstalk between the control lines by modeling and simulating the superconducting quantum chip using air bridges and inflow structures, and the simulation results show that the magnetic field crosstalk between the control lines is significantly improved after the introduction of air bridges and inflow structures. This work provides a basis for further suppression of magnetic field crosstalk between the z-control lines of superconducting quantum chips.
The increasing size of superconducting quantumcomputer chips requires a shift in evaluation methods for chip design. Three-dimensional (3D) electromagnetic (EM) simulations become computationally intractable as model size increases owing to the exponential growth in computation time. To address this challenge, we develop a technique that analyzes the circuit parameters of large-scale superconducting qubit chips by combining S-parameters simulated in smaller-scale 3D EM models. Herein, we design a four-qubit unit cell for large-scale qubit devices and evaluate both residual qubit-qubit coupling and control-line-to-qubit crosstalk for distant qubit pairs. In addition, we propose guard structures around qubits to mitigate nearestneighbor crosstalk. Although previous methods are limited to chips with at most ten qubits, our approach enables the analysis of systems with over a hundred qubits.
Microwave crosstalk poses a major challenge to scaling superconducting quantum devices as it introduces excess control errors. Although its magnitude and impact have been explored in various experimental settings, quantitative physical models capable of explaining measured crosstalk for a given device geometry remain scarce. Here, we address this gap by investigating microwave crosstalk in planar superconducting devices with crossovers. We identify two structures that can lead to strong crosstalk: a drive line routed in close proximity to another qubit, and a drive line crossing a qubit-qubit coupler using an air bridge. We design and characterize devices involving these structures and develop physical models that quantitatively explain the experimentally observed crosstalk. Based on these models, we discuss the design considerations for reducing microwave crosstalk. Our results provide practical guidance for low-crosstalk device layouts and establish a basis for the systematic investigation of weaker crosstalk mechanisms.
Superconducting qubits have achieved exceptional gate fidelities, exceeding the error-correction threshold in recent years. One key ingredient of such improvement is the introduction of tunable couplers to control the qubit-to-qubit coupling through frequency tuning. Moving toward fault-tolerant quantum computation, increasing the number of physical qubits is another step toward effective error correction codes. Under a multiqubit architecture, flux control (Z) lines are crucial in tuning the frequency of the qubits and couplers. However, dense flux lines result in magnetic flux crosstalk, wherein magnetic flux applied to one element inadvertently affects neighboring qubits or couplers. This crosstalk obscures the idle frequency of the qubit when flux bias is applied, which degrades gate performance and calibration accuracy. In this study, we characterize flux crosstalk and suppress it in a multiqubit-coupler chip with multi-Z lines without adding additional readout for couplers. By quantifying the mutual flux-induced frequency shifts of qubits and couplers, we construct a cancellation matrix that enables precise compensation of non-local flux, demonstrating a substantial reduction in Z-line crosstalk from 56.5‰ to 0.13‰, which is close to statistical error. Flux compensation corrects the CZ SWAP measurement, leading to a symmetric map with respect to flux bias. Compared with a crosstalk-free calculated CZ SWAP map, the measured map indicates that our approach provides a near-zero crosstalk for the coupler-transmon system. These results highlight the effectiveness of our approach in enhancing flux crosstalk-free control and supporting its potential for scaling superconducting quantum processors.
Quantum processors require a signal-delivery architecture with high addressability (low crosstalk) to ensure high performance already at the scale of dozens of qubits. Signal crosstalk causes inadvertent driving of quantum gates, which will adversely affect quantum gate fidelities in scaled-up devices. Here, we demonstrate packaged flip-chip superconducting quantum processors with signal-crosstalk performance competitive with those reported in other platforms. For capacitively coupled qubit-drive lines, we find on-resonant crosstalk better than − 27 dB (average − 37 dB). For inductively coupled magnetic-flux-drive lines, we find less than 0.13% direct-current flux crosstalk (average 0.05%). These observed crosstalk levels are adequately small and indicate a decreasing trend with increasing distance, which is promising for further scaling up to larger numbers of qubits. We discuss the implications of our results for the design of a low-crosstalk on-chip signal-delivery architecture, including the influence of a shielding tunnel structure, potential sources of crosstalk, and estimation of crosstalk-induced qubit-gate error in scaled-up quantum processors. Published by the American Physical Society 2024
In the design of superconducting quantum chips, the control and readout of the quantum bit (qubit) are realized through interactions with other components in the circuit, such as drive lines, flux lines and readout resonator. Depending on the design, these interactions employ either an inductive or capacitive coupling scheme. Note that every interaction governs critical performance metrics for the chip, including gate fidelity, readout speed, and coherence times, a more effective and precise approach to extract the strength of the coupling is necessary. For most qubit designs, the structure of the qubit typically remains in the electrically small regime. Therefore, simulation software based on static fields and the Method of Moments (MoM), such as Q3D, is still applicable in most instances. However, as the number of qubits on a chip increases, Q3D faces challenges in effectively addressing the complex coupling and crosstalk issues present on the chip. In this work, we extend the lumped-element-based qubit model by using microwave network parameters and thus enable the simulation of the qubit for the Finite Element Method (FEM)-based 3D electromagnetic simulation software, such as HFSS. This approach is suitable for the determination of the capacitive coupling strength between the qubit and the drive line, as well as readout circuits. Furthermore, to address the inductive coupling between the qubit and the flux line, we propose a method in this work that directly computes the mutual inductance, which is implemented by determining the magnetic flux through the DC SQUID area, generated by the current port excitation in HFSS. The proposed methodologies not only effectively extracts the key qubit design parameters, but also offer broader applicability for analysing complex crosstalk in multi-qubit chip designs.
Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.