Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Quantum Information and Computation

System design for large-scale ion trap quantum information processor

Jungsang Kim, Stanley Pau, Z. Ma, Hubert R. McLellan, J.V. Gates, A. Kornblit, Richard E. Slusher, R.M. Jopson, I. Kang, I-M. Dinu

Published Nov 1, 2005• 87 citations
Publisher

Abstract

We present a detailed system design and available technology choices for building a large scale ($>$ 100 qubits) ion trap quantum information processor (QIP). The system design is based on technologies that are within reach today, and utilizes single-instruction-on-multiple-data (SIMD) principles to re-use resources that cannot be duplicated easily. The system engineering principles adopted highlight various design tradeoffs in the QIP design and serve as a guideline to find design spaces for a much larger QIP.

DOI
10.26421/qic5.7-1

Related papers

Integrated Optics Technology for Ion Trap Based Large-scale Quantum Information Processor

Jungsang Kim, Changsoon Kim, Caleb W. Knoernschild +2 more

Realizing ion trap based large-scale quantum information processor requires integrated optics technologies. We design and characterize basic optical beam steering system using micromirrors as a first step towards constructing high-quality functional integrated optics.

Frontiers in Optics•Jan 1, 2006•0 citations

Chiplet technology for large-scale trapped-ion quantum processors

Bassem Badawi, Philip C. Holz, Michael Raffetseder +6 more

Trapped ions are among the most promising platforms for realizing a large-scale quantum information processor. Current progress focuses on integrating optical and electronic components into microfabricated ion traps to allow scaling to large numbers of ion qubits. Most available fabrication strategies for such integrated processors employ monolithic integration of all processor components and rely heavily on CMOS-compatible semiconductor fabrication technologies that are not optimized for the requirements of a trapped-ion quantum processor. In this work, we present a modular approach in which the processor modules, called chiplets, have specific functions and are fabricated separately. The individual chiplets are then combined using heterogeneous integration techniques. This strategy opens up the possibility of choosing the optimal materials and fabrication technology for each of the chiplets, with a minimum amount of fabrication limitations compared to the monolithic approach. Chiplet technology furthermore enables novel processor functionalities to be added in a cost-effective, modular fashion by adding or modifying only a subset of the chiplets. We describe the design concept of a chiplet-based trapped-ion quantum processor and demonstrate the technology with an example of an integrated individual-ion addressing system for a ten-ion crystal. The addressing system emphasizes the modularity of the chiplet approach, combining a surface ion trap manufactured on a glass substrate with a silicon substrate carrying integrated waveguides and a stack of 3D-printed micro-optics, achieving diffraction-limited focal spots at the ion positions.

quant-pharXiv:2512.02645•Dec 3, 2025•1 citation

Large-scale quantum computers

Jonathan A. Jones, Dieter Jaksch

Trapped ions, trapped atoms, and NMR spin systems are all fine ways of building small “toy” quantum computers, each with its own advantages and disadvantages. There are also many other techniques which have been suggested, although these three so far remain in the lead for general-purpose quantum computing. However, the most powerful general-purpose quantum computers constructed to date have only about a dozen qubits, and this is not nearly large enough to make quantum computers useful rather than merely interesting. (Larger systems have been used to demonstrate particular quantum information processing techniques, but these cannot as yet be used to implement arbitrary quantum algorithms.) Although it is not completely clear how complex a general-purpose quantum computer needs to be, it is clear that such a device will involve thousands or even millions of qubits, rather than the dozens involved today. It is, therefore, important to consider whether there is any hope of scaling up these technologies to useful sizes, and we will consider each of the three approaches in turn, before turning briefly to alternative technologies which have not been discussed so far. Trapped ions Trapped ions initially look very promising as a candidate for scaling up, as it is possible to trap thousands of ions while keeping a reasonable distance between them. Early experiments relied on particular tricks which only work with systems of two ions, but this is not true of more recent work, and there is no reason in principle why these large strings of ions could not be controlled.

Cambridge University Press eBooks•Jul 19, 2012•0 citations

Complete Methods Set for Scalable Ion Trap Quantum Information Processing

Jonathan Home, David Hanneke, John D. Jost +3 more

Large-scale quantum information processors must be able to transport and maintain quantum information and repeatedly perform logical operations. Here, we show a combination of all of the fundamental elements required to perform scalable quantum computing through the use of qubits stored in the internal states of trapped atomic ions. We quantified the repeatability of a multiple-qubit operation and observed no loss of performance despite qubit transport over macroscopic distances. Key to these results is the use of different pairs of 9Be+ hyperfine states for robust qubit storage, readout, and gates, and simultaneous trapping of 24Mg+ "re-cooling" ions along with the qubit ions.

arXiv:0907.1865•Science•Aug 7, 2009•283 citations

Architecting Noisy Intermediate-Scale Trapped Ion Quantum Computers

Prakash Murali, Dripto M. Debroy, Kenneth R. Brown +1 more

Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence and connectivity. However, current TI systems are small in size, with 5-20 qubits and typically use a single trap architecture which has fundamental scalability limitations. To progress towards the next major milestone of 50-100 qubit TI devices, a modular architecture termed the Quantum Charge Coupled Device (QCCD) has been proposed. In a QCCD-based TI device, small traps are connected through ion shuttling. While the basic hardware components for such devices have been demonstrated, building a 50-100 qubit system is challenging because of a wide range of design possibilities for trap sizing, communication topology and gate implementations and the need to match diverse application resource requirements.Towards realizing QCCD-based TI systems with 50-100 qubits, we perform an extensive application-driven architectural study evaluating the key design choices of trap sizing, communication topology and operation implementation methods. To enable our study, we built a design toolflow which takes a QCCD architecture's parameters as input, along with a set of applications and realistic hardware performance models. Our toolflow maps the applications onto the target device and simulates their execution to compute metrics such as application run time, reliability and device noise rates. Using six applications and several hardware design points, we show that trap sizing and communication topology choices can impact application reliability by up to three orders of magnitude. Microarchitectural gate implementation choices influence reliability by another order of magnitude. From these studies, we provide concrete recommendations to tune these choices to achieve highly reliable and performant application executions. With industry and academic efforts underway to build TI devices with 50-100 qubits, our insights have the potential to influence QC hardware in the near-future and accelerate the progress towards practical QC systems.

arXiv:2004.04706•Proceedings - International Symposium on Computer Architecture/Proceedings•May 1, 2020•83 citations

Towards fast and scalable trapped-ion quantum logic with integrated photonics

Karan K. Mehta, Chi Zhang, Stefanie Miller +1 more

Trapped-ion qubits promise certain fundamental advantages for quantum information processing (QIP), owing to their indistinguishability and relatively high isolation from noisy environments. Though these qualities have allowed demonstrations of the necessary primitives for quantum computation, the complexity of the optical apparatus required is a major impediment to implementation at scales where quantum systems offer a clear advantage over classical computers. Here, we build on previous work with trap-integrated waveguide optics, describing designs and simulations for commercial foundry-fabricated ion trap chips with integrated Si3N4 waveguides and grating couplers to implement multi-qubit operations. We detail a design intended to address and implement quantum logic gates between 5 ions in a single register, and a configuration which utilizes the stable on-chip path lengths of waveguide devices to enact a novel fast entangling two-qubit gate. The devices and approaches presented here could form elements of a scalable architecture for trapped-ion QIP.

Advances in Photonics of Quantum Computing, Memory, and Communication•Mar 4, 2019•16 citations
We present a detailed system design and available technology choices for building a large scale (>>> 100 qubits) ion trap quantum information processor (QIP). The system design is based on technologies that are within reach today, and utilizes single-instruction-on-multiple-data (SIMD) principles to re-use resources that cannot be duplicated easily. The system engineering principles adopted highlight various design tradeoffs in the QIP design and serve as a guideline to find design spaces for a much larger QIP.
Trapped ions are among the most promising platforms for realizing a large-scale quantum information processor. Current progress focuses on integrating optical and electronic components into microfabricated ion traps to allow scaling to large numbers of ion qubits. Most available fabrication strategies for such integrated processors employ monolithic integration of all processor components and rely heavily on CMOS-compatible semiconductor fabrication technologies that are not optimized for the requirements of a trapped-ion quantum processor. In this work, we present a modular approach in which the processor modules, called chiplets, have specific functions and are fabricated separately. The individual chiplets are then combined using heterogeneous integration techniques. This strategy opens up the possibility of choosing the optimal materials and fabrication technology for each of the chiplets, with a minimum amount of fabrication limitations compared to the monolithic approach. Chiplet technology furthermore enables novel processor functionalities to be added in a cost-effective, modular fashion by adding or modifying only a subset of the chiplets. We describe the design concept of a chiplet-based trapped-ion quantum processor and demonstrate the technology with an example of an integrated individual-ion addressing system for a ten-ion crystal. The addressing system emphasizes the modularity of the chiplet approach, combining a surface ion trap manufactured on a glass substrate with a silicon substrate carrying integrated waveguides and a stack of 3D-printed micro-optics, achieving diffraction-limited focal spots at the ion positions.
Trapped ions, trapped atoms, and NMR spin systems are all fine ways of building small “toy” quantum computers, each with its own advantages and disadvantages. There are also many other techniques which have been suggested, although these three so far remain in the lead for general-purpose quantum computing. However, the most powerful general-purpose quantum computers constructed to date have only about a dozen qubits, and this is not nearly large enough to make quantum computers useful rather than merely interesting. (Larger systems have been used to demonstrate particular quantum information processing techniques, but these cannot as yet be used to implement arbitrary quantum algorithms.) Although it is not completely clear how complex a general-purpose quantum computer needs to be, it is clear that such a device will involve thousands or even millions of qubits, rather than the dozens involved today. It is, therefore, important to consider whether there is any hope of scaling up these technologies to useful sizes, and we will consider each of the three approaches in turn, before turning briefly to alternative technologies which have not been discussed so far. Trapped ions Trapped ions initially look very promising as a candidate for scaling up, as it is possible to trap thousands of ions while keeping a reasonable distance between them. Early experiments relied on particular tricks which only work with systems of two ions, but this is not true of more recent work, and there is no reason in principle why these large strings of ions could not be controlled.
Large-scale quantum information processors must be able to transport and maintain quantum information and repeatedly perform logical operations. Here, we show a combination of all of the fundamental elements required to perform scalable quantum computing through the use of qubits stored in the internal states of trapped atomic ions. We quantified the repeatability of a multiple-qubit operation and observed no loss of performance despite qubit transport over macroscopic distances. Key to these results is the use of different pairs of 9Be+ hyperfine states for robust qubit storage, readout, and gates, and simultaneous trapping of 24Mg+ "re-cooling" ions along with the qubit ions.
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence and connectivity. However, current TI systems are small in size, with 5-20 qubits and typically use a single trap architecture which has fundamental scalability limitations. To progress towards the next major milestone of 50-100 qubit TI devices, a modular architecture termed the Quantum Charge Coupled Device (QCCD) has been proposed. In a QCCD-based TI device, small traps are connected through ion shuttling. While the basic hardware components for such devices have been demonstrated, building a 50-100 qubit system is challenging because of a wide range of design possibilities for trap sizing, communication topology and gate implementations and the need to match diverse application resource requirements.Towards realizing QCCD-based TI systems with 50-100 qubits, we perform an extensive application-driven architectural study evaluating the key design choices of trap sizing, communication topology and operation implementation methods. To enable our study, we built a design toolflow which takes a QCCD architecture's parameters as input, along with a set of applications and realistic hardware performance models. Our toolflow maps the applications onto the target device and simulates their execution to compute metrics such as application run time, reliability and device noise rates. Using six applications and several hardware design points, we show that trap sizing and communication topology choices can impact application reliability by up to three orders of magnitude. Microarchitectural gate implementation choices influence reliability by another order of magnitude. From these studies, we provide concrete recommendations to tune these choices to achieve highly reliable and performant application executions. With industry and academic efforts underway to build TI devices with 50-100 qubits, our insights have the potential to influence QC hardware in the near-future and accelerate the progress towards practical QC systems.
Trapped-ion qubits promise certain fundamental advantages for quantum information processing (QIP), owing to their indistinguishability and relatively high isolation from noisy environments. Though these qualities have allowed demonstrations of the necessary primitives for quantum computation, the complexity of the optical apparatus required is a major impediment to implementation at scales where quantum systems offer a clear advantage over classical computers. Here, we build on previous work with trap-integrated waveguide optics, describing designs and simulations for commercial foundry-fabricated ion trap chips with integrated Si3N4 waveguides and grating couplers to implement multi-qubit operations. We detail a design intended to address and implement quantum logic gates between 5 ions in a single register, and a configuration which utilizes the stable on-chip path lengths of waveguide devices to enact a novel fast entangling two-qubit gate. The devices and approaches presented here could form elements of a scalable architecture for trapped-ion QIP.