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Applied Mechanics and Materials

FPGA-Based Improved Decoding Algorithm of LDPC Codes

Qian Hua Zhang, Jianwu Zhang, Jian Rong Bao

Published Feb 1, 2014• 1 citation
Publisher

Abstract

In this paper, a low-complexity LDPC decoder structure was proposed by optimizing the confidence propagation algorithm based on the deep space standard LDPC codes developed by the Consultative Committee for Space Data Systems (CCSDS). With the improved decoding algorithm, the structure made full use of the quasi-cyclic structure to reduce the variables in the decoder and the storage unit use for the index position of the check nodes, which saves the hardware resources greatly. Furthermore, the updating of the check nodes takes advantages of the information iterative structure of the JPL-LDPC decoder, which can reduce the computational complexity. By improving the searching methods, the computational complexity and the difficulty in FPGA implementation were reduced. The decoding performance of the decoder is close to that of the floating-point BP algorithm, which can be widely used in deep space communication with low signal-to-noise ratio.performance close to a floating-point the BP algorithm performance, can be widely used in deep space communications suitable for low signal-to-noise ratio transmission.

DOI
10.4028/www.scientific.net/amm.519-520.993

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In this paper, a low-complexity LDPC decoder structure was proposed by optimizing the confidence propagation algorithm based on the deep space standard LDPC codes developed by the Consultative Committee for Space Data Systems (CCSDS). With the improved decoding algorithm, the structure made full use of the quasi-cyclic structure to reduce the variables in the decoder and the storage unit use for the index position of the check nodes, which saves the hardware resources greatly. Furthermore, the updating of the check nodes takes advantages of the information iterative structure of the JPL-LDPC decoder, which can reduce the computational complexity. By improving the searching methods, the computational complexity and the difficulty in FPGA implementation were reduced. The decoding performance of the decoder is close to that of the floating-point BP algorithm, which can be widely used in deep space communication with low signal-to-noise ratio.performance close to a floating-point the BP algorithm performance, can be widely used in deep space communications suitable for low signal-to-noise ratio transmission.
In this paper, a low-complexity LDPC decoder structure was proposed by optimizing the confidence propagation algorithm based on the deep space standard LDPC codes developed by the Consultative Committee for Space Data Systems (CCSDS). With the improved decoding algorithm, the structure made full use of the quasi-cyclic structure to reduce the variables in the decoder and the storage unit use for the index position of the check nodes, which saves the hardware resources greatly. Furthermore, the updating of the check nodes takes advantages of the information iterative structure of the JPL-LDPC decoder, which can reduce the computational complexity. By improving the searching methods, the computational complexity and the difficulty in FPGA implementation were reduced. The decoding performance of the decoder is close to that of the floating-point BP algorithm, which can be widely used in deep space communication with low signal-to-noise ratio.performance close to a floating-point the BP algorithm performance, can be widely used in deep space communications suitable for low signal-to-noise ratio transmission.
Low density parity check (LDPC) code is a kind of linear block code with excellent performance which is proposed by Dr. Gallager. It overcomes the shortcomings of other error correcting codes and it is the nearest channel code from Shannon limit at the present discover. The decoding algorithms of L DPC code can reduce the decoding delay by the parallel decoding structure, so this has caused great concern in many fields. In recent years more and more scholars begin to study LDPC code, this makes the coding and decoding algorithms of LDPC code improved continuously. LDPC code has been widely used in many fields such as optical fiber communication, digital watermarking, underwater communication and deep space communication because of its excellent performance. Non-binary LDPC code has better performance compared with binary LDPC code. In this paper, FFT-BP decoding algorithm of non-binary LDPC code is studied, and on this basis, we proposed an improved FFT-BP algorithm. The improved decoding algorithm can effectively reduce the average iteration number. Finally, we achieved encode and decode algorithm of non-binary LDPC code with FPGA.
In this paper, an improved decoding algorithm for Non-binary low density parity check (NB-LDPC) codes with low decoding complexity and suitable for field-programmable gate array (FPGA) implementation is proposed, which is a mixed logarithmic domain FFT-BP decoding algorithm (Mixed Log-FFT-BP) for the problem of high complexity of the existing decoding algorithms for Non-binary LDPC codes. The algorithm combines the traditional Log-BP algorithm with the FFT-BP algorithm, and simplifies the update of the check nodes in the iterative decoding process. A large number of convolution operations are converted into multiplication operations in frequency domain by using FFT transform and IFFT transform. The multiplication of the original FFT-BP algorithm is converted into the addition and look-up table operations in the logarithmic domain. Then, the logarithm of the probability information is directly solved, so that it can be decoded in the logarithmic domain, which saves the computation of the log likelihood ratio, and then reduces the complexity. Simulation results show that under the additive Gauss white noise channel, when the bit error rate is 10-5, compared with BP algorithm, Log-Bp algorithm and FFT-BP algorithm, the performance of Mixed Log-FFT-BP algorithm is not decreased, and all of them remain within the range of 0.1-0.2dB.
Low-density parity-check codes(LDPC) have the advantages of high performance, flexibility, parallelized processing and iterative decoding, which make them one of the widely used error correction code schemes in communication and storage systems. In order to improve the decoding convergence speed of low-density parity-check codes, the idea of layered decoding is added to the log-likelihood ratio confidence propagation decoding algorithm, and an improved algorithm based on layered decoding strategy is proposed, which solves the problem of low decoding rate caused by vertical iteration after the completion of horizontal iteration by using the log-likelihood ratio confidence propagation decoding algorithm in each layer, at the same time. The results show that the average decoding rate of the algorithm is improved by about 25.5% compared with that before the improvement without losing or almost losing the error correction performance, and the performance of the improved layered decoding algorithm with log-likelihood ratio confidence propagation decoding is optimal when the signal-to-noise ratio is greater than 4, and the decoding performance is improved.
Low-density parity-check (LDPC) codes over finite fields GF(q) have a better performance than those of the binary low-density parity-check codes, at short and medium block lengths, but the decoder of GF(q)-LDPC has more complexity. In this paper, we present a new reduced-complexity belief propagation (BP) decoding algorithm for GF(q)-LDPC codes by analyzing the reliability of code symbols. Instead of update all the variable nodes during iteration, we just update variable nodes which are mostly to be in an error. The algorithm also shows a property to reduce the effects of oscillating on decoding. The simulations prove that we could improve performance and reduce complexity at the same time for short and medium GF(q)-LDPC codes.
Entering the 5G era, the hardware design of low-density parity-check (LDPC) codes under the new standard has increasingly higher requirements on throughput. According to the geometric characteristics of the check matrices of the quasi-cyclicQC) LDCP codes under the CCSDS standard, this paper designs a layered dynamic normalized minimum sum algorithm(LDNMSA) under the pre-termination decoding based on de-layering scheme. The check matrix structure of this code is easy for hardware design and the storage resource consumption is low. The approximate replacement of the minimum sum algorithm(MSA) reduces the computational complexity of the check node update process. The determination of correction factors and inter-layer deletion thresholds through computer simulation improves the decoding performance and the speed of a single iteration, and adopt the layered scheduling scheme with optimized update order reduces the number of iterations required for decoding. Experimental results show that when the bit error rate(BER) is 10-5, the designed algorithm has a gain of approximately 0.5 dB compared to the MSA. The speed and calculation amounts to a single iteration are much lower than the log-likelihood-ratio(LLR) belief propagation(BP) algorithm and the performance is only less than 0.1dB.