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Nature Photonics

Surface ion trap

Noriaki Horiuchi

Published Dec 20, 2021• 0 citations
Publisher
DOI
10.1038/s41566-021-00937-1

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IN SITU PLASMA REMOVAL OF SURFACE CONTAMINANTS FROM ION TRAP ELECTRODES

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In this thesis, the construction and implementation of an in situ plasma discharge designed to remove surface contaminants from electrodes in an ion trapping experimental system is presented with results. In recent years, many advances have been made in using ion traps for quantum information processing. All of the criteria defined by DiVincenzo for using ion traps for implementing a quantum computer have been individually demonstrated, and in particular surface traps provide a scalable platform for ions. In order to be used for quantum algorithms, trapped ions need to be cooled to their motional (quantum mechanical) ground state. One of the hurdles in integrating surface ion traps for a quantum computer is minimizing electric field noise, which causes the ion to heat out of its motional ground state and which increases with smaller ion-to-electrode distances realized with surface traps. Surface contamination of trap electrodes is speculated to be the primary source of electric field noise. The main goal achieved by this work was to implement an in situ surface cleaning solution for surface electrode ion traps, which would not modify the ion trap electrode surface metal. Care was taken in applying the RF power in order to localize a plasma near the trap electrodes. A method for characterizing the energy of the plasma ions arriving at the ion trap surface is presented and results for plasma ion energies are shown. Finally, a method for quantifying the effectiveness of plasma cleaning of trap electrodes, using the surface analysis technique of X-ray photoelectron spectroscopy for measuring the amount and kind of surface contaminants, is described. A significant advantage of the trap electrode surface cleaning method presented here is the minimal changes necessary for implementation on a working ion trap experimental system.

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In this paper, 3D architecture for TSV integrated Si surface ion-trap is proposed, in which the TSV and microbump technology is used to connect the surface electrodes of ion trap to a bottom Si interposer. The pseudopotential simulation is used to determine the trapped ion height for both the “planar trap” and “TSV trap” geometry. No significant deviation in the pseudopotential for both cases is observed. Preliminary micro-fabricated ion-trap chips are characterized. The proposed technology is promising in form factor and parasitic reduction of micro-fabricated surface ion-trap for scalable quantum computing application.

IEEE Electron Devices Technology & Manufacturing Conference (EDTM)•Mar 1, 2019•1 citation
In this thesis, the construction and implementation of an in situ plasma discharge designed to remove surface contaminants from electrodes in an ion trapping experimental system is presented with results. In recent years, many advances have been made in using ion traps for quantum information processing. All of the criteria defined by DiVincenzo for using ion traps for implementing a quantum computer have been individually demonstrated, and in particular surface traps provide a scalable platform for ions. In order to be used for quantum algorithms, trapped ions need to be cooled to their motional (quantum mechanical) ground state. One of the hurdles in integrating surface ion traps for a quantum computer is minimizing electric field noise, which causes the ion to heat out of its motional ground state and which increases with smaller ion-to-electrode distances realized with surface traps. Surface contamination of trap electrodes is speculated to be the primary source of electric field noise. The main goal achieved by this work was to implement an in situ surface cleaning solution for surface electrode ion traps, which would not modify the ion trap electrode surface metal. Care was taken in applying the RF power in order to localize a plasma near the trap electrodes. A method for characterizing the energy of the plasma ions arriving at the ion trap surface is presented and results for plasma ion energies are shown. Finally, a method for quantifying the effectiveness of plasma cleaning of trap electrodes, using the surface analysis technique of X-ray photoelectron spectroscopy for measuring the amount and kind of surface contaminants, is described. A significant advantage of the trap electrode surface cleaning method presented here is the minimal changes necessary for implementation on a working ion trap experimental system.
We introduce the Trapped-Ion Surface Code Compiler (TISCC), a software tool that generates circuits for a universal set of surface code patch operations in terms of a native trapped-ion gate set. To accomplish this, TISCC manages an internal representation of a trapped-ion system where a repeating pattern of trapping zones and junctions is arranged in an arbitrarily large rectangular grid. Surface code operations are compiled by instantiating surface code patches on the grid and using methods to generate transversal operations over data qubits, rounds of error correction over stabilizer plaquettes, and/or lattice surgery operations between neighboring patches. Beyond the implementation of a basic surface code instruction set, TISCC contains corner movement functionality and a patch translation that is implemented using ion movement alone. Except in the latter case, all TISCC functionality is extensible to alternative grid-like hardware architectures. TISCC output has been verified using the Oak Ridge Quasi-Clifford Simulator (ORQCS).
In this paper, 3D architecture for TSV integrated Si surface ion-trap is proposed, in which the TSV and microbump technology is used to connect the surface electrodes of ion trap to a bottom Si interposer. The pseudopotential simulation is used to determine the trapped ion height for both the “planar trap” and “TSV trap” geometry. No significant deviation in the pseudopotential for both cases is observed. Preliminary micro-fabricated ion-trap chips are characterized. The proposed technology is promising in form factor and parasitic reduction of micro-fabricated surface ion-trap for scalable quantum computing application.