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Bulletin of the American Physical Society

Universal quantum logic in hot silicon qubits

H. G. J. Eenink, Luca Petit, Maximilian Russ, William I. L. Lawrie, Nico W. Hendrickx, Jim Clarke, Lieven M. K. Vandersypen, Menno Veldhorst

Published Mar 3, 2020• 0 citations
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Silicon Quantum Computers

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Forthcoming CMOS technology nodes are in principle sufficient for achieving both the quantum information density and the speed that are critical for error-free logical qubits. Using data from the roadmap for semiconductor devices from ITRS and IEDM, we applied the standard CMOS design rules to a universal set of quantum logic gates to control silicon qubits. We consequently obtain a scaling law for quantum information density for Steane code, concatenated codes, and surface code, which represent the quantum information equivalent of Moore's law in terms of density scaling per node. By imposing the constraints due to both quantum error correction and the intrinsic operation speed limitation of a physical silicon qubit, we determine that technology nodes below 14 nm can in principle support error-free logical qubits manipulated at GHz frequency. We review the current state-of- the-art of silicon technology to assess the performance of different silicon qubit architectures based on CMOS single donors and double quantum dot devices. Our analysis demonstrates that silicon technology is compatible with the scalability requirements imposed by quantum error correction architectures for universal quantum computing. Such considerations provide a benchmark for the development of a silicon-based quantum computer and a general guideline for other quantum technology platforms.
Quantum errors induced by environmental noise are unavoidable and preclude the direct implementation of practical quantum computation. Fault-tolerant quantum computation offers one of the viable paths, necessitating the encoding and processing of information within logical qubits to curb such errors. Although substantial progress has been achieved recently in building silicon quantum computers, logical operations still haven’t been realized in silicon. Here we demonstrate a logical quantum processor using a phosphorus donor cluster in silicon. By implementing the [[4, 2, 2]] code, we realize the essential components for logical operations, which include fault-tolerant preparation of logical states and the characterization of a universal gate set comprising logical single-qubit and two-qubit gates. In particular, the logical T gate is achieved using the gate-by-measurement method, and magic states based on this gate are prepared. Furthermore, we execute the variational quantum eigensolver algorithm using two logical qubits and simulate the ground state of the electronic structure of the water molecule H2O. This work represents a key step towards scalable, fault-tolerant quantum computation in silicon spin qubits. Five nuclear spins in silicon and the [[4, 2, 2]] code are used to demonstrate a universal logical gate set and to execute a variational quantum eigensolver computation of the ground-state energy of a water molecule.