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A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers

Kiseo Kang, Byung-Jun Kim, Gahyun Choi, Sun-Kyung Lee, Jisoo Choi, Jaeho Lee, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Yonuk Chong, Jae‐Yoon Sim

Published Jun 13, 2021• 0 citations
OpenAlex

Abstract

This work presents a qubit controller IC based on the direct synthesis. The IC consists of six independently-working pulse modulators utilizing the same LO frequency. We propose a sinusoid-shaping nonlinear DAC followed by a linear interpolating DAC to improve both of energy and hardware efficiencies. The implemented IC in 40nm CMOS is verified by superconducting qubit operations with Rabi and Ramsey oscillations while consuming power of < 1/60 compared with the previous state-of-the-art.

Related papers

A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers

Kiseo Kang, Byung-Jun Kim, Gahyun Choi +8 more

This work presents a qubit controller IC based on the direct synthesis. The IC consists of six independently-working pulse modulators utilizing the same LO frequency. We propose a sinusoid-shaping nonlinear DAC followed by a linear interpolating DAC to improve both of energy and hardware efficiencies. The implemented IC in 40nm CMOS is verified by superconducting qubit operations with Rabi and Ramsey oscillations while consuming power of < 1/60 compared with the previous state-of-the-art.

Symposium on VLSI Circuits•Jun 13, 2021•23 citations

A Polar-Modulation-Based Cryogenic Qubit State Controller in 28nm Bulk CMOS

Yanshu Guo, Yaoyu Li, Wenqiang Huang +7 more

In today's mainstream superconducting quantum computing platforms in a dilution refrigerator, the qubits work at a cryogenic temperature (CT) of a few tens of mK, while the qubit controller hardware works on plates with temperature ranging from a few K to room temperature (RT). The highly-integrated cryo-CMOS qubit controller ASIC that can fully work at 3-4K has been proven to be the most feasible way to scale down the quantum computing system [1–5]. In [1], a pulse modulator is implemented with a limited qubit driving capability, which can only generate fixed length symmetric driving pulse. The controllers in [2], [3] generated the RF driving pulse with a frequency division multiplexing (FDM) mode, with the power dissipation of 192mW/qubit and 46.5mW/qubit, respectively. In [4], a local oscillator (LO) was included to improve the controller integration level, and the chip power consumption was 24.1mW/qubit. An arbitrary waveform generation (AWG) functionality digital design was presented in [5] with a power consumption of 23.1mW/qubit. Nevertheless, with continuously increasing number of qubits to integrate, it remains as one of the major tasks to further reduce the power consumption and size of controller.

Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference•Feb 19, 2023•25 citations

A Cryo-CMOS Controller IC With Fully Integrated Frequency Generators for Superconducting Qubits

Kiseo Kang, Donggyu Minn, Seunghun Bae +7 more

Extensive research on quantum mechanics in past decades has successfully paved the way towards the disruptive technology of quantum computing. A further step to the realization of a fault-tolerant scalable quantum computer is presenting challenges in the field of engineering. It necessitates a microsystem operating at 4K in a dilution refrigerator, which would be inevitable to control thousands or millions of qubits sitting at 10mK. There have been IC implementations of pulse modulators generating qubit-controlling microwave signals [1– 4]. The pulse modulation based on direct synthesis demonstrated feasibility of driving multiple qubits with frequency-division multiplexing (FDM) through one RF cable [1 – 3]. The first implementation of a full controller [1], which includes both read and write chains for spin qubits, demonstrated the highest level of integration. However, the previous work used external local oscillator (LO) sources for frequency synthesis. External feeding of LO requires precise matching; otherwise, a failure would cause leakage to the qubit driving output through PCB traces, resulting in AC-Stark shift of qubit state by unwanted tones at near-resonance. It becomes more problematic in FDM-based multi-qubit driving. Since the fidelity of qubit operations strongly relies on the quality of driving frequency, a low-noise LO generation by a phase-locked loop (PLL) is one of the most important factors [5]. The internal generation of LO gives additional benefits in superconducting qubit interface. It necessitates multiple LOs since the superconducting qubit uses microwave pulse driving for both read and write. To detect the state of a qubit through dispersive readout, the phase reflected from the readout resonator should be measured. Therefore, the driving pulses for the read and the write should be synchronized to a single reference timing. Using built-in PLLs sharing a single reference clock naturally solves this problem.

Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference•Feb 20, 2022•45 citations

A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit

Kiseo Kang, Donggyu Minn, Seongun Bae +5 more

This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%.

IEEE Journal of Solid-State Circuits•Aug 25, 2022•46 citations

A Polar-Modulation-Based Cryogenic Transmon Qubit State Controller in 28 nm Bulk CMOS for Superconducting Quantum Computing

Yanshu Guo, Qichun Liu, Yaoyu Li +10 more

This article presents a cryogenic transmon qubit state controller integrated circuit (IC) working at a temperature of 3.5 K for superconducting quantum computing (QC) applications. The qubit state controller IC comprises a polar-modulation-based XY -path driver and a current-steering digital-to-analog converter (DAC)-based${Z}$-path driver. To generate the XY -path driving pulse with arbitrary envelopes in the frequency range of 4–6 GHz, a switched-capacitor digital power amplifier (DPA) is adopted for amplitude modulation, and an injection locking local oscillator (IL-LO) with a constant-slope digital-to-time-converter (DTC) is used for open-loop phase modulation. With the proposed DPA and IL-LO, the controller can control a qubit with a compact architecture. Fabricated in the 28-nm bulk CMOS process, the controller IC occupies an active die area of 0.9 mm2 per driving channel. The controller achieves a spurious-free dynamic range (SFDR) of 40 dB for a 1 GS/s XY -path driver and an SFDR of 48 dB for a 1 GS/s${Z}$-path driver at 3.5 K. The controller consumes a power of 13.7 mW per qubit. A Rabi experiment at 13.9 MHz, a Ramsey experiment at 3.09 MHz, and a T1 experiment at 15.87$\mu \text{s}$are conducted using the presented controller IC at 3.5 K to control the transmon superconducting qubit at 10 mK directly.

IEEE Journal of Solid-State Circuits•Sep 26, 2023•12 citations

High-Fidelity Control of Superconducting Qubits Using Direct Microwave Synthesis in Higher Nyquist Zones

William D. Kalfus, Diana F. Lee, Guilhem J. Ribeill +5 more

Control electronics for superconducting quantum processors have strict requirements for accurate command of the sensitive quantum states of their qubits. Hinging on the purity of ultra-phase-stable oscillators to upconvert very-low-noise baseband pulses, conventional control systems can become prohibitively complex and expensive when scaling to larger quantum devices, especially as high sampling rates become desirable for fine-grained pulse shaping. Few-gigahertz radio-frequency (RF) digital-to-analog converters (DACs) present a more economical avenue for high-fidelity control while simultaneously providing greater command over the spectrum of the synthesized signal. Modern RF DACs with extra-wide bandwidths are able to directly synthesize tones above their sampling rates, thereby keeping the system clock rate at a level compatible with modern digital logic systems while still being able to generate high-frequency pulses with arbitrary profiles. We have incorporated custom superconducting qubit control logic into off-the-shelf hardware capable of low-noise pulse synthesis up to 7.5 GHz using an RF DAC clocked at 5 GHz. Our approach enables highly linear and stable microwave synthesis over a wide bandwidth, giving rise to high-resolution control and a reduced number of required signal sources per qubit. We characterize the performance of the hardware using a five-transmon superconducting device and demonstrate consistently reduced two-qubit gate error (as low as 1.8%), which we show results from superior control chain linearity compared to traditional configurations. The exceptional flexibility and stability further establish a foundation for scalable quantum control beyond intermediate-scale devices.

arXiv:2008.02873•IEEE Transactions on Quantum Engineering•Jan 1, 2020•27 citations
This work presents a qubit controller IC based on the direct synthesis. The IC consists of six independently-working pulse modulators utilizing the same LO frequency. We propose a sinusoid-shaping nonlinear DAC followed by a linear interpolating DAC to improve both of energy and hardware efficiencies. The implemented IC in 40nm CMOS is verified by superconducting qubit operations with Rabi and Ramsey oscillations while consuming power of < 1/60 compared with the previous state-of-the-art.
In today's mainstream superconducting quantum computing platforms in a dilution refrigerator, the qubits work at a cryogenic temperature (CT) of a few tens of mK, while the qubit controller hardware works on plates with temperature ranging from a few K to room temperature (RT). The highly-integrated cryo-CMOS qubit controller ASIC that can fully work at 3-4K has been proven to be the most feasible way to scale down the quantum computing system [1–5]. In [1], a pulse modulator is implemented with a limited qubit driving capability, which can only generate fixed length symmetric driving pulse. The controllers in [2], [3] generated the RF driving pulse with a frequency division multiplexing (FDM) mode, with the power dissipation of 192mW/qubit and 46.5mW/qubit, respectively. In [4], a local oscillator (LO) was included to improve the controller integration level, and the chip power consumption was 24.1mW/qubit. An arbitrary waveform generation (AWG) functionality digital design was presented in [5] with a power consumption of 23.1mW/qubit. Nevertheless, with continuously increasing number of qubits to integrate, it remains as one of the major tasks to further reduce the power consumption and size of controller.
Extensive research on quantum mechanics in past decades has successfully paved the way towards the disruptive technology of quantum computing. A further step to the realization of a fault-tolerant scalable quantum computer is presenting challenges in the field of engineering. It necessitates a microsystem operating at 4K in a dilution refrigerator, which would be inevitable to control thousands or millions of qubits sitting at 10mK. There have been IC implementations of pulse modulators generating qubit-controlling microwave signals [1– 4]. The pulse modulation based on direct synthesis demonstrated feasibility of driving multiple qubits with frequency-division multiplexing (FDM) through one RF cable [1 – 3]. The first implementation of a full controller [1], which includes both read and write chains for spin qubits, demonstrated the highest level of integration. However, the previous work used external local oscillator (LO) sources for frequency synthesis. External feeding of LO requires precise matching; otherwise, a failure would cause leakage to the qubit driving output through PCB traces, resulting in AC-Stark shift of qubit state by unwanted tones at near-resonance. It becomes more problematic in FDM-based multi-qubit driving. Since the fidelity of qubit operations strongly relies on the quality of driving frequency, a low-noise LO generation by a phase-locked loop (PLL) is one of the most important factors [5]. The internal generation of LO gives additional benefits in superconducting qubit interface. It necessitates multiple LOs since the superconducting qubit uses microwave pulse driving for both read and write. To detect the state of a qubit through dispersive readout, the phase reflected from the readout resonator should be measured. Therefore, the driving pulses for the read and the write should be synchronized to a single reference timing. Using built-in PLLs sharing a single reference clock naturally solves this problem.
This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The proposed globally synchronized clock system internally generates different local oscillator (LO) frequencies using multiple phase-locked loops (PLLs) driven by a common reference clock. It provides flexibility in spectral management as well as scalability for expansion to a large-scale quantum controller. The test chip includes two PLLs, four pulse modulator channels, and two receiver channels. Implemented chip in 40-nm CMOS shows full functionalities at 3.5 K. The designed pulse modulator circuits are verified with the specifications for expected fidelity of 99.99%.
This article presents a cryogenic transmon qubit state controller integrated circuit (IC) working at a temperature of 3.5 K for superconducting quantum computing (QC) applications. The qubit state controller IC comprises a polar-modulation-based XY -path driver and a current-steering digital-to-analog converter (DAC)-basedZ{Z}Z-path driver. To generate the XY -path driving pulse with arbitrary envelopes in the frequency range of 4–6 GHz, a switched-capacitor digital power amplifier (DPA) is adopted for amplitude modulation, and an injection locking local oscillator (IL-LO) with a constant-slope digital-to-time-converter (DTC) is used for open-loop phase modulation. With the proposed DPA and IL-LO, the controller can control a qubit with a compact architecture. Fabricated in the 28-nm bulk CMOS process, the controller IC occupies an active die area of 0.9 mm2 per driving channel. The controller achieves a spurious-free dynamic range (SFDR) of 40 dB for a 1 GS/s XY -path driver and an SFDR of 48 dB for a 1 GS/sZ{Z}Z-path driver at 3.5 K. The controller consumes a power of 13.7 mW per qubit. A Rabi experiment at 13.9 MHz, a Ramsey experiment at 3.09 MHz, and a T1 experiment at 15.87μs\mu \text{s}μsare conducted using the presented controller IC at 3.5 K to control the transmon superconducting qubit at 10 mK directly.
Control electronics for superconducting quantum processors have strict requirements for accurate command of the sensitive quantum states of their qubits. Hinging on the purity of ultra-phase-stable oscillators to upconvert very-low-noise baseband pulses, conventional control systems can become prohibitively complex and expensive when scaling to larger quantum devices, especially as high sampling rates become desirable for fine-grained pulse shaping. Few-gigahertz radio-frequency (RF) digital-to-analog converters (DACs) present a more economical avenue for high-fidelity control while simultaneously providing greater command over the spectrum of the synthesized signal. Modern RF DACs with extra-wide bandwidths are able to directly synthesize tones above their sampling rates, thereby keeping the system clock rate at a level compatible with modern digital logic systems while still being able to generate high-frequency pulses with arbitrary profiles. We have incorporated custom superconducting qubit control logic into off-the-shelf hardware capable of low-noise pulse synthesis up to 7.5 GHz using an RF DAC clocked at 5 GHz. Our approach enables highly linear and stable microwave synthesis over a wide bandwidth, giving rise to high-resolution control and a reduced number of required signal sources per qubit. We characterize the performance of the hardware using a five-transmon superconducting device and demonstrate consistently reduced two-qubit gate error (as low as 1.8%), which we show results from superior control chain linearity compared to traditional configurations. The exceptional flexibility and stability further establish a foundation for scalable quantum control beyond intermediate-scale devices.