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Improvement of decoding algorithms for low-density parity-check codes

Junho Cho

Published Jan 1, 2010• 0 citations
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An Improved Bit-flipping Decoding Algorithm for Low-density Parity-check Codes

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An improved bit-flipping decoding algorithm is proposed for low-density parity-check(LDPC) codes in this paper.Two influences on error probabilities of code bits are considered: the influence of the number of code bits included in an unsatisfied check,and the influence of the number of unsatisfied checks of each code bit.No soft information is required for decoding.Simulation results show that improvement on performance is observed for the proposed algorithm,and it provides better performance over several soft-decision bit-flipping decoding algorithms for LDPC codes with large girth.

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Self reliability based weighted bit-flipping decoding for low-density parity-check codes

Jin Sha, Minglun Gao, Zhongjin Zhang +2 more

Abstract- Low Density Parity Check (LDPC) codes can be decoded in various ways, namely the Bit-Flipping (BF) algorithm, the Weighted BF algorithm (WBF) ， the Belief Propagation (BP) algorithm and so on. These algorithms provide a wide range of tradeoffs among decoding complexity, decoding speed, and error rate performance. In this paper, a novel self-reliability-based weighted bit-flipping decoding scheme for low-density parity-check codes is proposed. Improvement in performance is observed in comparison with the modified weighted bit-flipping decoding scheme, and the decoding complexity can be significantly reduced as well. Key-Words:- Low-density parity-check (LDPC) codes, decoding algorithm, bit flipping, self reliability

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Decoding Algorithms for Low-Density Parity-Check Codes with Multilevel Modulations

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An improved low-complexity sum-product decoding algorithm for low-density parity-check codes

Michaelraj Kingston Roberts, Ramesh Jayabalan

In this paper, an improved low-complexity sum-product decoding algorithm is presented for low-density parity-check (LDPC) codes. In the proposed algorithm, reduction in computational complexity is achieved by utilizing fast Fourier transform (FFT) with time shift in the check node process. The improvement in the decoding performance is achieved by utilizing an optimized integer constant in the variable node process. Simulation results show that the proposed algorithm achieves an overall coding gain improvement ranging from 0.04 to 0.46 dB. Moreover, when compared with the sum-product algorithm (SPA), the proposed decoding algorithm can achieve a reduction of 42%–67% of the total number of arithmetic operations required for the decoding process.

Frontiers of Information Technology & Electronic Engineering•Jun 1, 2015•12 citations
An improved bit-flipping decoding algorithm is proposed for low-density parity-check(LDPC) codes in this paper.Two influences on error probabilities of code bits are considered: the influence of the number of code bits included in an unsatisfied check,and the influence of the number of unsatisfied checks of each code bit.No soft information is required for decoding.Simulation results show that improvement on performance is observed for the proposed algorithm,and it provides better performance over several soft-decision bit-flipping decoding algorithms for LDPC codes with large girth.
Abstract- Low Density Parity Check (LDPC) codes can be decoded in various ways, namely the Bit-Flipping (BF) algorithm, the Weighted BF algorithm (WBF) ， the Belief Propagation (BP) algorithm and so on. These algorithms provide a wide range of tradeoffs among decoding complexity, decoding speed, and error rate performance. In this paper, a novel self-reliability-based weighted bit-flipping decoding scheme for low-density parity-check codes is proposed. Improvement in performance is observed in comparison with the modified weighted bit-flipping decoding scheme, and the decoding complexity can be significantly reduced as well. Key-Words:- Low-density parity-check (LDPC) codes, decoding algorithm, bit flipping, self reliability
In this paper, an improved low-complexity sum-product decoding algorithm is presented for low-density parity-check (LDPC) codes. In the proposed algorithm, reduction in computational complexity is achieved by utilizing fast Fourier transform (FFT) with time shift in the check node process. The improvement in the decoding performance is achieved by utilizing an optimized integer constant in the variable node process. Simulation results show that the proposed algorithm achieves an overall coding gain improvement ranging from 0.04 to 0.46 dB. Moreover, when compared with the sum-product algorithm (SPA), the proposed decoding algorithm can achieve a reduction of 42%–67% of the total number of arithmetic operations required for the decoding process.