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Cybersecurity Education Science Technique

MATHEMATICAL MODEL FOR TRANSITIONAL PROCESSES IN JOSEPHSON MEMORY ELEMENTS

М. В. Тиханський, Andrii Partyka

Published Jan 1, 2020• 0 citations
Publisher

Abstract

The goal of this work is to find ways of enhancing the speed of computer memory cells by using structures that employ operating principles other than those of traditional semiconductors’ schemes. One of the applications of the unique properties of Josephson structures is their usage in novel superfast computer memory cells. Thanks to their high working characteristic frequencies close to 1 THz, the Josephson structures are most promising candidates to be used in petaflop computers. Moreover, both Josephson cryotrons and Josephson SQUIDs can be used in qubits, which are basic units in quantum computers, and also for describing a macroscopic quantum behavior, for example, during read-out processes in quantum computations. In the present work, we have created a mathematical model of transition processes in Josephson cryotrons during direct, “1” → ”0”, as well as inverse, “0” → “1”, logical transitions. We have considered controlling the logical state of Josephson memory cells based on Josephson tunneling junctions of the S-I-S type via external current pulses. By means of mathematical modelling, we have studied transition processes in cryotrons during the change of their logical state and calculated their transition characteristics for working temperatures T1 = 11.6 K and T2 = 81.2 K, which ale close to the boiling temperatures of helium and nitrogen, respectively. It has been shown that such memory cells can effectively operate at the working temperature T2 = 81.2 K. We have determined commutation times for both the direct “0” → “1” and inverse “0” → “1” transitions. We have also identified peculiar behaviors of the Josephson cryotrons based memory cells and studied the stability of their operation.

DOI
10.28925/2663-4023.2020.8.7384

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The goal of this work is to find ways of enhancing the speed of computer memory cells by using structures that employ operating principles other than those of traditional semiconductors’ schemes. One of the applications of the unique properties of Josephson structures is their usage in novel superfast computer memory cells. Thanks to their high working characteristic frequencies close to 1 THz, the Josephson structures are most promising candidates to be used in petaflop computers. Moreover, both Josephson cryotrons and Josephson SQUIDs can be used in qubits, which are basic units in quantum computers, and also for describing a macroscopic quantum behavior, for example, during read-out processes in quantum computations. In the present work, we have created a mathematical model of transition processes in Josephson cryotrons during direct, “1” → ”0”, as well as inverse, “0” → “1”, logical transitions. We have considered controlling the logical state of Josephson memory cells based on Josephson tunneling junctions of the S-I-S type via external current pulses. By means of mathematical modelling, we have studied transition processes in cryotrons during the change of their logical state and calculated their transition characteristics for working temperatures T1 = 11.6 K and T2 = 81.2 K, which ale close to the boiling temperatures of helium and nitrogen, respectively. It has been shown that such memory cells can effectively operate at the working temperature T2 = 81.2 K. We have determined commutation times for both the direct “0” → “1” and inverse “0” → “1” transitions. We have also identified peculiar behaviors of the Josephson cryotrons based memory cells and studied the stability of their operation.
Using of traditional logic elements in digital electronics has ensured the development of a wide range of electronic devices for many years. In parallel, research and development of logical elements are carried out on the basis of other non-traditional physical phenomena or effects, in particular logic elements based on the phenomenon of superconductivity, the prospect of which is the use of very small energy consumption and ultrahigh performance. For superconducting logic elements, using various Josephson cryoelectronic structures, known as Josephson cryotrons, based on the stationary and non-stationary effects of Josephson. On the basis of the Josephson cryotrons, one can create Josephson elements of computer memory, and Josephson elements of digital logic. The main requirements for the Josephson cryotrons are a stable operating mode and high speed or short switching time. Information about the mode of operation and the speed give us the transition characteristics of the cryotrons - the time dependence of the voltage on the cryotron while changing its logical state, which can be obtained either experimentally, or theoretically. This work aims at a search for new ways of increasing the switching rate of digital logical operators by employing physical structures other than the traditional semiconductor-based schemes. We propose the principles of designing digital logical operators based on Josephson cryotrons, whose operation utilizes the stationary and dynamical Josephson effects, and describe the operational principles of the logical elements “AND” and “OR” bases on tunneling Josephson junctions “superconductor-insulator-superconductor”. Our proposed mathematical models for the commutation processes in such logical elements allowed us to calculate their transition characteristics during the switching and to determine the main parameters in such models. It was shown that the logical elements “AND” and “OR” can be implemented on individual cryotrons and that their logical state can be controlled by input signals in a form of current pulses. Such logical elements meet all the requirements for digital logical elements and have switching time of about 2-3 ps, which indicates their significantly increased switching rate.
We propose a design principle of digital logic gates based on Josephson cryotrons. The operation mode of digital logic gates AND and OR based on tunnel junctions “superconductor–insulator–superconductor” was described. Mathematical models of the switching processes in the logic elements were developed, the transient characteristics during the logic state change were calculated, and the basic parameters of these models were determined. It was shown that digital logic gates “AND” and “OR” can be realized based on individual Josephson cryotrons and their logic state can be controlled by using current pulses as control inputs. Such logic gates satisfy all the requirements for digital logic elements and have switching time of about 2–3 ps.
Energy efficient cryogenic memory and Josephson junction arrays have the potential of revolutionizing high-performance computing systems based on single flux quantum logic. In this paper, a pulse control is designed to switch among stable equilibrium states of a Josephson junction array. Josephson junction arrays have the ability to store state information at low temperatures and energies, which naturally is useful for cryogenic memory applications. Although typical memory applications involve binary states, as a memory cell, the Josephson junction array has the ability to occupy nonbinary states given the nonlinear nature of the dynamics, which can lead to a reduced number of cells required in practical applications among other advantages. Transitions between states can be achieved through experimental testing for specific transitions, however, there are no known closed-form solutions to arbitrarily transition from one stable state to another. The system dynamics are similar to an array of coupled nonlinear oscillators, for which there is no known analytical solution. By providing an energy-based analysis for the junction array, a lower bound is determined and system trajectories are closely approximated such that the array is capable of transitioning between any desired stable equilibrium states under a Gaussian pulse input.
Abstract : Lack of high-density, fast and memory has been a long-standing problem in superconducting digital electronics. Alternative Josephson-junction-based memory cells and peripheral circuits have intrinsic problems which impede the application of that kind of memory. The CMOS-Josephson hybrid memory idea was proposed in 1992 to circumvent this problem. In the present work we have designed and demonstrated a 64-kb CMOS-Josephson hybrid memory working at 1 GHz. In order to make the hybrid idea practical, a complete and comprehensive 4 K short-channel CMOS model for digital circuits was developed for this dissertation. It has been used in the design of the memory core and peripheral circuits. A fast hybrid interface circuit that transforms single-flux-quantum millivolt 2-ps pulse signals to CMOS volt-level signals has been studied and the optimized design has been completed. Using a nonvolatile cryogenic 3-T DRAM cell, the memory core is designed in such a way that the access time is much less than for room-temperature operation, not only because of the performance upgrade due to the temperature decrease but also because of a different reading mechanism. Fabricated by commercial submicron CMOS processes (0.25 microns and 0.18 microns) and a Nb/AlOx/Nb Josephson-junction process with 2.5 kA/cm2 tunneling current density, the memory chips were bonded together by direct wire-bonding and by flip-chip bump-bonding and tested at low frequencies, high frequencies, respectively. A subnanosecond access time is obtained both from simulations and experiments. The power for an interface circuit is measured to be 0.6 mW. The memory core consumes even less power. The total power consumption depends on the operation mode of the memory and is calculated to be 10 mW for reading and 28 mW for writing. Simulations also indicate that, with more advanced semiconductor and superconductor technologies, larger and faster hybrid memories are expected to be achievable in the future.
The superconducting tunnel effect predicted by Brian Josephson in 1962 is looking increasingly promising for another very practical application—as logic and memory circuits for computers. Josephson-junction circuits are capable of high switching speeds (50–100 picosec have already been obtained). And because such circuits operate at voltages comparable to the superconducting energy gap, the heat generated is typically microwatts, thousands of times lower than high-speed transistor circuits. The diminished heat-removal problem allows one to pack the Josephson circuits much closer than semiconductor circuits. Once high switching speeds are achieved, this packability becomes extremely important because then the major limitation on computer speed is how fast the electrical signal takes to move from one circuit to another.
Abstract In this paper we analyze a cryogenic memory cell circuit based on a small coupled array of Josephson junctions. All the basic memory operations (e.g., write, read, and reset) are implemented on the same circuit and different junctions in the array can in principle be utilized for these operations. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics (SFQ). As an example, we demonstrate memory operation driven by a SFQ pulse employing an inductively coupled array of three Josephson junctions. We have chosen realistic Josephson junction parameters based on state-of-the-art fabrication capabilities and have calculated access times and access energies for basic memory cell operations. We also implemented an optimization procedure based on the simulated annealing algorithm to calculate the optimized and typical values of access times and access energies.