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Low Temperature Physics

Modeling the switching processes in the Josephson AND and OR logic gates

М. В. Тиханський, Р. Р. Крисько

Published Feb 1, 2013• 0 citations
Publisher

Abstract

We propose a design principle of digital logic gates based on Josephson cryotrons. The operation mode of digital logic gates AND and OR based on tunnel junctions “superconductor–insulator–superconductor” was described. Mathematical models of the switching processes in the logic elements were developed, the transient characteristics during the logic state change were calculated, and the basic parameters of these models were determined. It was shown that digital logic gates “AND” and “OR” can be realized based on individual Josephson cryotrons and their logic state can be controlled by using current pulses as control inputs. Such logic gates satisfy all the requirements for digital logic elements and have switching time of about 2–3 ps.

DOI
10.1063/1.4791770

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We propose a design principle of digital logic gates based on Josephson cryotrons. The operation mode of digital logic gates AND and OR based on tunnel junctions “superconductor–insulator–superconductor” was described. Mathematical models of the switching processes in the logic elements were developed, the transient characteristics during the logic state change were calculated, and the basic parameters of these models were determined. It was shown that digital logic gates “AND” and “OR” can be realized based on individual Josephson cryotrons and their logic state can be controlled by using current pulses as control inputs. Such logic gates satisfy all the requirements for digital logic elements and have switching time of about 2–3 ps.
Using of traditional logic elements in digital electronics has ensured the development of a wide range of electronic devices for many years. In parallel, research and development of logical elements are carried out on the basis of other non-traditional physical phenomena or effects, in particular logic elements based on the phenomenon of superconductivity, the prospect of which is the use of very small energy consumption and ultrahigh performance. For superconducting logic elements, using various Josephson cryoelectronic structures, known as Josephson cryotrons, based on the stationary and non-stationary effects of Josephson. On the basis of the Josephson cryotrons, one can create Josephson elements of computer memory, and Josephson elements of digital logic. The main requirements for the Josephson cryotrons are a stable operating mode and high speed or short switching time. Information about the mode of operation and the speed give us the transition characteristics of the cryotrons - the time dependence of the voltage on the cryotron while changing its logical state, which can be obtained either experimentally, or theoretically. This work aims at a search for new ways of increasing the switching rate of digital logical operators by employing physical structures other than the traditional semiconductor-based schemes. We propose the principles of designing digital logical operators based on Josephson cryotrons, whose operation utilizes the stationary and dynamical Josephson effects, and describe the operational principles of the logical elements “AND” and “OR” bases on tunneling Josephson junctions “superconductor-insulator-superconductor”. Our proposed mathematical models for the commutation processes in such logical elements allowed us to calculate their transition characteristics during the switching and to determine the main parameters in such models. It was shown that the logical elements “AND” and “OR” can be implemented on individual cryotrons and that their logical state can be controlled by input signals in a form of current pulses. Such logical elements meet all the requirements for digital logical elements and have switching time of about 2-3 ps, which indicates their significantly increased switching rate.
The goal of this work is to find ways of enhancing the speed of computer memory cells by using structures that employ operating principles other than those of traditional semiconductors’ schemes. One of the applications of the unique properties of Josephson structures is their usage in novel superfast computer memory cells. Thanks to their high working characteristic frequencies close to 1 THz, the Josephson structures are most promising candidates to be used in petaflop computers. Moreover, both Josephson cryotrons and Josephson SQUIDs can be used in qubits, which are basic units in quantum computers, and also for describing a macroscopic quantum behavior, for example, during read-out processes in quantum computations. In the present work, we have created a mathematical model of transition processes in Josephson cryotrons during direct, “1” → ”0”, as well as inverse, “0” → “1”, logical transitions. We have considered controlling the logical state of Josephson memory cells based on Josephson tunneling junctions of the S-I-S type via external current pulses. By means of mathematical modelling, we have studied transition processes in cryotrons during the change of their logical state and calculated their transition characteristics for working temperatures T1 = 11.6 K and T2 = 81.2 K, which ale close to the boiling temperatures of helium and nitrogen, respectively. It has been shown that such memory cells can effectively operate at the working temperature T2 = 81.2 K. We have determined commutation times for both the direct “0” → “1” and inverse “0” → “1” transitions. We have also identified peculiar behaviors of the Josephson cryotrons based memory cells and studied the stability of their operation.
In the present work, we have improved the mathematical model of transition processes in Josephson memory cells (cryotrons), which can be created on the base of semiconductor quantum interferometers (SQUIDs). We employed two-contact SQUIDs to construct the cryotrons and investigated the possibilities to control the cryotrons’ logical state by means of mathematical modeling. A combined method of logical state controlling of such cryotrons has been proposed since the simpler controlling method, where only impulses of magnetic flux are used, fails to provide stable operation of cryotrons during the inverse logical transitions “1” → “0”. We show that the direct logical transitions “0” → “1” are effectively realized via controlling magnetic flux impulses whereas the transitions “1” → “0” are realized via controlling current impulses. Transition characteristics of the cryotrons during direct and inverse logical transitions are calculated.
The design and experimental investigation of a simple logic circuit employing Josephson tunnel junctions as the switching elements is described. The design utilized matched transmission lines as signal carriers. The physical layout was simulated on a computer with a model consisting of 3 Josephson gates and 28 transmission line segments. Results of both quasi-static and high speed testing were found to be in essential agreement with theoretical expectations; only dynamic results are presented here in detail. The experimental circuit had gates with 165 ps risetimes, and in the high speed investigation, was operated with bursts of 700 ps risetime pulses tightly spaced so as to simulate a repetition rate of ∼1 GHz.
Superconducting (SC) electronics (SCE) is one of the major requirements to develop a large-scale practical quantum computing system. (Figs. 1(a)) [1]. Currently, a room temperature conventional computer is used as the control processor which requires a huge number of lossy interconnects to connect with the qubits placed at a few millikelvin temperatures. This, in turn, limits the scalability of the quantum computing system up to hundreds of qubits which is not enough to achieve the full potential [2]. Therefore, along with a suitable cryogenic memory, a cryogenic (preferably superconducting) control processor is required to develop a quantum computing system with thousands of qubits. Moreover, SCE offers ultra-fast (hundreds of gigahertz) and highly energy efficient (sub attojoule/bit) performance [3]. Therefore, SCE is projected to achieve the department of energy (DOE) exascale goal which the conventional supercomputers failed to achieve (Fig. 1(b)) [4]. However, Josephson junction-based SC circuits suffer from limited integration density due to flux trapping, difficulty in driving large impedances, fanning out digital signals, and operating in noisy environments [5]. To address these existing issues, here, we present a novel reconfigurable SC logic circuit using a nano-cryotron (nTron) that can perform 1-input copy, 2-input AND and OR, and 3-input majority logic functionalities. This work can enable the implementation of highly scalable and energy-efficient SC processor since the use of only one device. To achieve the reconfigurable nature of the logic circuit, we utilize the multi-gate switching of nTron.
The recent progress in quantum computing and space exploration led to a surge in interest in cryogenic electronics. Superconducting devices such as Josephson junction, Josephson field effect transistor, cryotron, and superconducting quantum interference device (SQUID) are traditionally used to build cryogenic logic gates. However, due to the superconducting nature, gate-voltage-based control of these devices is extremely difficult. Even more challenging is to cascade the logic gates because most of these devices require current bias for their operation. Therefore, these devices are not as convenient as the semiconducting transistors to design logic gates. Here, to overcome these challenges, we propose a ferroelectric SQUID (FeSQUID) based voltage-controlled logic gates. FeSQUID exhibits two different critical current levels for two different voltage-switchable polarization states of the ferroelectric. We utilize the polarization-dependent (hence, voltage-controllable) superconducting to resistive switching of FeSQUID to design Boolean logic gates such as Copy, NOT, AND, and OR gates. The operations of these gates are verified using a Verilog-A-based compact model of FeSQUID. Finally, to demonstrate the fanning out capability of FeSQUID-based logic family, we simulate a two-input XOR gate using FeSQUID-based NOT, AND, and OR gates. Together with the ongoing progress on FeSQUID-based non-volatile memory, our designed FeSQUID-based logic family will enable all FeSQUID-based cryogenic computer, ensuring minimum mismatch between logic and memory blocks in terms of speed, power consumption, and fabrication process.