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International SoC Design Conference

Fast Multibit Decision Method for Successive-Cancellation List Polar Decoder

Seo Lin Jeong, Seung Yong Kim, Jung Hyun Bae, Myung Hoon Sunwoo

Published Oct 6, 2019• 0 citations
Publisher

Abstract

SC and SCL are the decoding algorithms for polar codes that have the disadvantage of high latency due to serial operations. Several algorithms, such as Fast-SSC, multibit decision, have been proposed to improve the latency with additional circuits, however, areas become larger. This paper proposes an efficient multibit decision algorithm to improve latency based on the SCL algorithm. In addition, we propose the combined nodes that combine node types of the fast-SSC algorithm to increase area efficiency and reduce the number of decoding cycles.

DOI
10.1109/isocc47750.2019.9078465

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Polar codes, as the first provable capacity-achieving error-correcting codes, have received much attention in recent years. However, the decoding performance of polar codes with traditional successive-cancellation (SC) algorithm cannot match that of the low-density parity-check or Turbo codes. Because SC list (SCL) decoding algorithm can significantly improve the error-correcting performance of polar codes, design of SCL decoders is important for polar codes to be deployed in practical applications. However, because the prior latency reduction approaches for SC decoders are not applicable for SCL decoders, these list decoders suffer from the long-latency bottleneck. In this paper, we propose a multibit-decision approach that can significantly reduce latency of SCL decoders. First, we present a reformulated SCL algorithm that can perform intermediate decoding of 2 b together. The proposed approach, referred as 2-bit reformulated SCL (2b-rSCL) algorithm, can reduce the latency of SCL decoder from (3n-2) to (2n-2) clock cycles without any performance loss. Then, we extend the idea of 2-b-decision to general case, and propose a general decoding scheme that can perform intermediate decoding of any 2Kbits simultaneously. This general approach, referred as 2K-bit reformulated SCL (2Kb-rSCL) algorithm, can reduce the overall decoding latency to as short as n/2K-2-2 cycles. Furthermore, on the basis of the proposed algorithms, very large-scale integration architectures for 2b-rSCL and 4b-rSCL decoders are synthesized. Compared with a prior SCL decoder, the proposed (1024, 512) 2b-rSCL and 4b-rSCL decoders can achieve 21% and 60% reduction in latency, 1.66 and 2.77 times increase in coded throughput with list size 2, and 2.11 and 3.23 times increase in coded throughput with list size 4, respectively.

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International Conference on Communications•May 16, 2022•9 citations
SC and SCL are the decoding algorithms for polar codes that have the disadvantage of high latency due to serial operations. Several algorithms, such as Fast-SSC, multibit decision, have been proposed to improve the latency with additional circuits, however, areas become larger. This paper proposes an efficient multibit decision algorithm to improve latency based on the SCL algorithm. In addition, we propose the combined nodes that combine node types of the fast-SSC algorithm to increase area efficiency and reduce the number of decoding cycles.
Polar codes, as the first provable capacity-achieving error-correcting codes, have received much attention in recent years. However, the decoding performance of polar codes with traditional successive-cancellation (SC) algorithm cannot match that of the low-density parity-check or Turbo codes. Because SC list (SCL) decoding algorithm can significantly improve the error-correcting performance of polar codes, design of SCL decoders is important for polar codes to be deployed in practical applications. However, because the prior latency reduction approaches for SC decoders are not applicable for SCL decoders, these list decoders suffer from the long-latency bottleneck. In this paper, we propose a multibit-decision approach that can significantly reduce latency of SCL decoders. First, we present a reformulated SCL algorithm that can perform intermediate decoding of 2 b together. The proposed approach, referred as 2-bit reformulated SCL (2b-rSCL) algorithm, can reduce the latency of SCL decoder from (3n-2) to (2n-2) clock cycles without any performance loss. Then, we extend the idea of 2-b-decision to general case, and propose a general decoding scheme that can perform intermediate decoding of any 2Kbits simultaneously. This general approach, referred as 2K-bit reformulated SCL (2Kb-rSCL) algorithm, can reduce the overall decoding latency to as short as n/2K-2-2 cycles. Furthermore, on the basis of the proposed algorithms, very large-scale integration architectures for 2b-rSCL and 4b-rSCL decoders are synthesized. Compared with a prior SCL decoder, the proposed (1024, 512) 2b-rSCL and 4b-rSCL decoders can achieve 21% and 60% reduction in latency, 1.66 and 2.77 times increase in coded throughput with list size 2, and 2.11 and 3.23 times increase in coded throughput with list size 4, respectively.
The successive-cancellation list (SCL) and successive-cancellation flip (SCF) decoding can be used to improve the performance of polar codes, especially for short to moderate length codes. However, their serial decoding nature results in significant decoding latencies. Implementing some operations in parallel can reduce their decoding latencies. This paper presents fast implementations of the SCL and SCF decoders. In particular, we propose fast parallel list decoders for five newly identified types of nodes in the decoding tree of a polar code, which significantly improves the decoding latency. We also present novel fast SCF decoders that decode some special nodes in the decoding tree of a polar code without serially computing bit log-likelihood ratios. Using our proposed fast parallel SCF decoders, we observed an improvement up to 81% with respect to the original SCF decoder. This significant reduction in the decoding latency is observed without sacrificing the bit-error-rate performance of the code.
Being able to provide excellent error-correction performance for polar codes with short-to-moderate code length, successive-cancellation list (SCL) is regarded as one of the most promising decoding algorithms. However, the application of SCL decoding in low-latency communication scenarios is limited due to its sequential nature. Recently, fast list decoding algorithms are proposed by considering special nodes with low code rates. Aiming at achieving further speedup for SCL decoding, this paper presents fast list decoding algorithms for two types of high-rate special nodes, namely single-parity-check (SPC) and sequence rate-1(SRI) nodes, based on the minimum-combinations set (MCS) which is able to significantly narrow the search space of candidate paths. Typically, SPC nodes can be directly decoded within one round of path splitting procedure, whereas SR1 nodes, as a group of parallel SPC nodes, can also be decode efficiently. Simulation results show that the proposed fast SCL decoder is able to reduce the decoding latency by 68.4% as compared to the state of the art, without any error-correction performance degradation.
This work focuses on further reducing the decoding latency of the successive cancellation list (SCL) algorithm for polar codes, considering the fact that some path splitting may be unnecessary if a bit is reliable during the transmission. Specifically, during the node-wise SCL decoding progress, only unreliable bits need to conduct path clone, leading to the reduction of the number of path splitting and the decoding latency. On this basis, this paper proposes an improved simplified SCL (SSCL) algorithm and an improved Fast-SCL (FSCL) algorithm, for low-latency polar decoding. Simulation results performed on a (4096, 2048) polar code show that the improved SSCL algorithm reduces the decoding latency by around 44.7% when L = 4, and by 62.8% when L = 8, respectively. Moreover, the improved FSCL algorithm achieves a reduction of decoding latency by about 37.3% when L = 8, for a (4096, 3840) polar code.
Due to the ability to provide superior error-correction performance, the successive cancellation list (SCL) algorithm is widely regarded as one of the most promising decoding algorithms for polar codes with short-to-moderate code lengths. However, the application of SCL decoding in low-latency communication scenarios is limited due to its sequential nature. To reduce the decoding latency, developing tailored fast and efficient list decoding algorithms of specific polar constituent codes (special nodes) is a promising solution. Recently, fast list decoding algorithms are proposed by considering special nodes with low code rates. Aiming to further speedup the SCL decoding, this paper presents fast list decoding algorithms for two types of high-rate special nodes, namely single-parity-check (SPC) nodes and sequence rate one or single-parity-check (SR1/SPC) nodes. In particular, we develop two classes of fast list decoding algorithms for these nodes, where the first class uses a sequential decoding procedure to yield decoding latency that is linear with the list size, and the second further parallelizes the decoding process by pre-determining the redundant candidate paths offline. Simulation results show that the proposed list decoding algorithms are able to achieve up to 70.7% lower decoding latency than state-of-the-art fast SCL decoders, while exhibiting the same error-correction performance.
Compared with the bit-wise successive cancellation list (SCL) decoding of polar codes, the node-based Fast SCL decoding significantly reduces the decoding latency by identifying special constituent codes and decoding these in parallel. To further reduce the latency of current Fast SCL decoders, we first propose a fast sequence repetition (SR) node-based SCL (Fast SR-SCL) decoding algorithm, which only involves one type of node in the SCL decoding tree. Furthermore, we employ the adaptive path splitting (APS) strategy to terminate the path splitting in the SR node early, without degrading the error-correcting performance. Numerical results show that for 5G uplink codes with a length of 1024 and rates of 1/4, 1/2, and 3/4, our decoder can deliver the same decoding performance while reducing the average latency by 34.5%, 38.0%, and 39.6% compared with the state-of-the-art Fast SCL decoder for a list size L = 8.