Constructing Quantum Combinational Logic Circuits

Piotr Marecki

Orhan Yaman, Tuba Şanlı, Mehmet Karaköse

Algorithms specifically designed for quantum computers have been developed. In quantum circuits, the Feynman, Toffoli, and Fredkin gates are employed instead of traditional inputs such as AND, OR, NAND, NOR, XOR, and XNOR in combinational logic gates. The ability to convert quantum circuits into combinational logic circuits, or vice versa, is of utmost importance. This essay study (or paper) aims to demonstrates the process of deriving combinational logic circuits from reversible quantum circuits. To achieve this, the Quine-McCluskey technique was utilized along with state tables generated from the quantum circuits to obtain an optimal logic expression that serves as the basis for constructing the combinational logic circuit. The resultant obtained combinational logic circuit was implemented within the MATLAB Simulink environment, and state tables were obtained. A comparison was made between the state tables derived from the quantum circuit and the combinational circuit, yielding successful results.

Hafiz Md. Hasan Babu

Saleem Mohammed Ridha Taha

Sujit Biswas, Rajat Subhra Goswami

Abstract Decoder is a combinational logic circuit; it changes a code into a collection of signals. Decoder is incredibly important circuit employed in combinational logic. Reversible logic may be a new research area due to its reduction in power dissipation and lots of researchers proposed differing types of approaches to construct a quantum reversible decoder. In this paper we tried to design n to 2n reversible decoder using modified TOFFOLI reversible logic gates. We proposed 1 to 21, 2 to 22 and 3 to 23, 4 to 24 and 5 to 25 reversible decoder and analyzed its lead in respect of quantum cost and garbage output. We tried to propose an algorithm that helps to design n to 2n reversible decoder. All circuit of the decoder are tested by using IBM Quantum Experience circuit composer.

Hironao YAMADA, Toshiro Tanaka

A novel structure of high-speed Josephson logic circuits is proposed. Josephson logic gates have latching characteristics and can hold data as long as bias currents are supplied. Through effective use of these latching characteristics, logic circuits can be constructed with wide operating margins. Dual power supplies, properly phased, separately drive logic circuits divided into two groups. Logic signals are transferred from one logic group to the other or vice versa, and one group is reset into a zero voltage state when the other group is active for logic operation. For combinational circuits, the basic configuration of an astable flip-flop and a delay circuit are presented to prevent the logic circuit from `racing'. As an example of sequential circuits, a bistable flip-flop to store data is constructed without any superconducting loop.