Control of Transmon Qubits using a Cryogenic CMOS Integrated Circuit

Xiao Xue, Bishnu Patra, Jeroen P. G. van Dijk +22 more

Joseph C. Bardin, Ted White, Marissa Giustina +30 more

Implementation of an error-corrected quantum computer is believed to require a quantum processor with a million or more physical qubits, and, in order to run such a processor, a quantum control system of similar scale will be required. Such a controller will need to be integrated within the cryogenic system and in close proximity with the quantum processor in order to make such a system practical. Here, we present a prototype cryogenic CMOS quantum controller designed in a 28-nm bulk CMOS process and optimized to implement a 16-word (4-bit)XYgate instruction set for controlling transmon qubits. After introducing the transmon qubit, including a discussion of how it is controlled, design considerations are discussed, with an emphasis on error rates and scalability. The circuit design is then discussed. Cryogenic performance of the underlying technology is presented, and the results of several quantum control experiments carried out using the integrated controller are described. This article ends with a comparison to the state of the art and a discussion of further research to be carried out. It has been shown that the quantum control IC achieves promising performance while dissipating less than 2 mW of total ac and dc power and requiring a digital data stream of less than 500 Mb/s.

Bishnu Patra, Xiao Xue, Jeroen P. G. van Dijk +21 more

Yanshu Guo, Qichun Liu, Yaoyu Li +10 more

This article presents a cryogenic transmon qubit state controller integrated circuit (IC) working at a temperature of 3.5 K for superconducting quantum computing (QC) applications. The qubit state controller IC comprises a polar-modulation-based XY -path driver and a current-steering digital-to-analog converter (DAC)-based${Z}$-path driver. To generate the XY -path driving pulse with arbitrary envelopes in the frequency range of 4–6 GHz, a switched-capacitor digital power amplifier (DPA) is adopted for amplitude modulation, and an injection locking local oscillator (IL-LO) with a constant-slope digital-to-time-converter (DTC) is used for open-loop phase modulation. With the proposed DPA and IL-LO, the controller can control a qubit with a compact architecture. Fabricated in the 28-nm bulk CMOS process, the controller IC occupies an active die area of 0.9 mm2 per driving channel. The controller achieves a spurious-free dynamic range (SFDR) of 40 dB for a 1 GS/s XY -path driver and an SFDR of 48 dB for a 1 GS/s${Z}$-path driver at 3.5 K. The controller consumes a power of 13.7 mW per qubit. A Rabi experiment at 13.9 MHz, a Ramsey experiment at 3.09 MHz, and a T1 experiment at 15.87$\mu \text{s}$are conducted using the presented controller IC at 3.5 K to control the transmon superconducting qubit at 10 mK directly.

Kevin Tien, Ken Inoue, Scott Lekuch +21 more

Future generations of quantum computers are expected to operate in a paradigm where multi-qubit devices will predominantly perform circuits to support quantum error correction. Highly integrated cryogenic electronics are a key enabling technology to support the control of the large numbers of physical qubits that will be required in this fault-tolerant, error-corrected regime. Here, we describe our perspectives on cryoelectronics-driven qubit control architectures, and will then describe an implementation of a scalable, low-power, cryogenic qubit state controller that includes a domain-specific processor and a SSB upconversion I/Q-mixer-based RF AWG. We will also describe an FPGA-based emulation platform that is able to closely reproduce the system intention, and which was used to verify different aspects of the ASIC system design in in situ transmon qubit control experiments.

Matthew Parker