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Proceedings - Asian Test Symposium/Proceedings

Detailed Fault Model for Physical Quantum Circuits

Arighna Deb, Debesh Kumar Das

Published Dec 1, 2019• 3 citations
Publisher

Abstract

Quantum circuits have recently been developed thanks to the global companies like IBM, Google, Microsoft and Intel. The physical realization of quantum circuits motivates to explore new areas of research. Testing of quantum circuits is one such area which needs significant attention in order to detect faulty gate operations in the circuits. To this end, first we need to identify the different types of faults that can result due to some unwanted physical failures during the implementation of the gate operations. This paper investigates those possibilities of physical failures in realizing the quantum operations and introduces a new family of fault models for quantum circuits. Experimental results include the actual number of newly proposed faults that can occur at the physical level of any quantum circuit.

DOI
10.1109/ats47505.2019.00028

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Quantum circuits have recently been developed thanks to the global companies like IBM, Google, Microsoft and Intel. The physical realization of quantum circuits motivates to explore new areas of research. Testing of quantum circuits is one such area which needs significant attention in order to detect faulty gate operations in the circuits. To this end, first we need to identify the different types of faults that can result due to some unwanted physical failures during the implementation of the gate operations. This paper investigates those possibilities of physical failures in realizing the quantum operations and introduces a new family of fault models for quantum circuits. Experimental results include the actual number of newly proposed faults that can occur at the physical level of any quantum circuit.
Detection and isolation of faults is a crucial step in the physical realization of quantum circuits. Even though quantum gates and circuits compute reversible functions, the standard techniques of automatic test pattern generation (ATPG) for classical reversible circuits are not directly applicable to quantum circuits. For faulty quantum circuits under the widely accepted single fault assumption, we show that their behavior can be fully characterized by the (single) faulty gate and the corresponding fault model. This allows us to efficiently determine test input states as well as measurement strategy for fault detection and diagnosis. Building on top of these, we design randomized algorithms which are able to detect every nontrivial single-gate fault with minimal probability of error. We also describe similar algorithms for fault diagnosis. We evaluate our algorithms by the number of output samples that needs to be collected and the probability of error. Both of these can be related to the eigenvalues of the operators corresponding to the circuit gates. We experimentally compare all our strategies with the state-of-the-art ATPG techniques for quantum circuits under the “single missing faulty gate” model and demonstrate that significant improvement is possible if we can exploit the quantum nature of circuits.
Abstract As a new research area, quantum software testing lacks systematic testing benchmarks to assess testing techniques’ effectiveness. Recently, some open-source benchmarks and mutation analysis tools have emerged. However, there is insufficient evidence on how various quantum circuit characteristics (e.g., circuit depth, number of quantum gates), algorithms (e.g., Quantum Approximate Optimization Algorithm), and mutation characteristics (e.g., mutation operators) affect the detection of mutants in quantum circuits. Studying such relations is important to systematically design faulty benchmarks with varied attributes (e.g., the difficulty in detecting a seeded fault) to facilitate assessing the cost-effectiveness of quantum software testing techniques efficiently. To this end, we present a large-scale empirical evaluation with more than 700K faulty benchmarks (quantum circuits) generated by mutating 382 real-world quantum circuits. Based on the results, we provide valuable insights for researchers to define systematic quantum mutation analysis techniques. We also provide a tool to recommend mutants to users based on chosen characteristics (e.g., a quantum algorithm type) and the required difficulty of detecting mutants. Finally, we also provide faulty benchmarks that can already be used to assess the cost-effectiveness of quantum software testing techniques.
A new approach to detecting and diagnosing faults in quantum circuits is introduced. In order to account for the probabilistic nature of quantum circuits, collections of test experiments, called binary tomographic tests (BTTs), are generated. A BTT can identify a fault with respect to some user-defined confidence threshold τ. We present an algorithm to generate BTTs that either detect, or ensure the absence of, all modeled faults in a given circuit. We also present an adaptive diagnostic method to locate quantum faults. While classical circuits, even probabilistic ones, only handle ordinary probabilities, quantum circuits deal with quantum states, which have phase as an extra probabilistic parameter. The tomographic testing methods introduced previously for probabilistic circuits are unable to detect differences in phase, and therefore leave many quantum faults undetected. In contrast, we develop a design-for-test method which is specifically intended to detect faults that only affect the phase of a quantum state. We give experimental results for benchmark and random circuits which show high coverage of quantum faults by BTTs, and good resolution in the case of the adaptive diagnosis method.
Detecting and isolating faults is crucial for synthesis of quantum circuits. Under the single fault assumption that is now routinely accepted in circuit fault analysis, we show that the behaviour of faulty quantum circuits can be fully characterized by the single faulty gate and the corresponding fault model. This allows us to efficiently determine test input states as well as measurement strategy that can be used to detect every single-gate fault using very few test cases and with minimal probability of error; in fact we demonstrate that most commonly used quantum gates can be isolated without any error under the single missing gate fault (SMGF) model. We crucially exploit the quantum nature of circuits to show vast improvement upon the existing works of automatic test pattern generation (ATPG) for quantum circuits.
This thesis is concerned with certain theoretical problems that arise naturally in the context of fault-tolerant quantum computation. Fault-tolerance can be defined as the art of building reliable devices from unreliable components, and is of particular importance for quantum computers that aim to precisely control the dynamics of extremely sensitive quantum systems. A model of quantum computation is a specification of the basic building blocks by which a quantum computation is implemented. The best known model is the quantum circuit model, where computations are implemented by means of unitary quantum gates that are applied to two-level quantum systems known as qubits. In a physical implementation of a quantum circuit, the gates and qubits will inevitably be affected by noise. Fault-tolerant quantum circuits are designed to be resilient against the effects of this noise, provided that it is not too strong. Fault-tolerance in the quantum circuit model is well developed thanks to the theory of quantum error-correcting codes. These codes allow for the correction of small numbers of errors introduced by a variety of noise processes. In a fault-tolerant quantum circuit, qubits are replaced with encoded qubits, and quantum gates with encoded gates that are immediately followed by special quantum circuits for error correction. Provided the rate at which errors occur is below a constant threshold value, the accumulation of errors can be checked so that the correct output of the computation correctly determined. The threshold acts as both a measure of how good the design of a quantum circuit is, and also as a target for experimenters aiming to implement quantum circuits. Much current research in quantum computation is aimed at designing quantum circuits that increase the noise threshold, hopefully to the point where it becomes within the reach of experimenters. A fault-tolerant encoded quantum gate must limit the propagation of errors so that the code’s corrective capabilities are not overwhelmed. It is not so easy to design encoded gates that satisfy this property, and to date only a finite handful of such gates are known. In a faulttolerant quantum circuit, all quantum gates must be decomposed or compiled in terms of those that may be implemented fault-tolerantly. In the first part of this thesis, we present two results that may be applied to this problem of gate compilation. The first is a generic method based on the Solovay-Kitaev theorem that may be applied to all quantum gates, but is most effective for those that act on single qubits. We present the Solovay-Kitaev theorem in its simples known form as an algorithm, together with novel constructions that can be used to implement it. Following this we give a two specialized methods for two-qubit gate decomposition, based on the Cartan decomposition of the Lie group SU(4). The cluster-state model of computation is an alternative to the quantum circuit model, and makes use of quantum measurements and highly entangled cluster-states to implement a quantum computation. The fault-tolerant techniques developed for quantum circuits are not immediately applicable in this model, so in order for it to be a realistic candidate for performing computations we prove that such techniques are possible. In the second part of the thesis we prove that constant fault-tolerance thresholds may be achieved in the cluster-state model, and in particular in an adaption to an optical implementation. Following this we design a complete error correction scheme for optical cluster-state computation, and numerically determine the threshold of this model in the face of the dominant noise models likely to affect such an implementation.
This work extends a general method used to test classical circuits to quantum circuits. Gate internal errors are address using a discrete fault model. Fault models to represent unwanted nearest neighbor entanglement as well as unwanted qubit rotation are presented. When witnessed, the faults we model are probabilistic, but there is a set of tests with the highest probability of detecting a discrete repetitive fault. A method of probabilistic set covering to identify the minimal set of tests is introduced. A large part of our work consisted of writing a software package that allows us to compare various fault models and test strategies for quantum networks. Faculty Mentor: Marek A. Perkowski