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RaEl

High-speed electronic analog of Josephson junctions and SQUIDs

Victor K. Kornev, Vasili K. Semenov

Published Sep 1, 1985• 0 citations
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Arnold H. Silver, R. Phillips, Robert D. Sandell

High speed, single flux quantum (SFQ) binary scalers are important components in superconducting analog-to-digital converters (ADC). This paper reviews the concept for a SQUID ADC and the design of an SFQ binary ripple counter, and reports the simulation of key components, and fabrication and performance of non-latching SQUID scalers and SFQ binary ripple counters. The SQUIDs were fabricated with Nb/Nb2O5/PbIn junctions and interconnected by monolithic-superconducting transmission lines and isolation resistors. Each SQUID functioned as a bistable flip-flop with the input connected to the center of the device and the output across one junction. All junctions were critically damped to optimize the pulse response. Operation was verified by observing the do I-V curves of successive SQUIDs driven by a cw pulse train generated on the same chip. Each SQUID exhibited constant-voltage current steps at 1/2 the voltage of the preceding device as expected from the Josephson voltage-to-frequency relation. Steps were observed only for the same voltage polarity of successive devices and for proper phase bias of the SQUID. Binary frequency division was recorded up to 40GHz for devices designed to operate to 28GHz.

IEEE Transactions on Magnetics•Mar 1, 1985•29 citations
A high-speed electronic analog for high-accuracy simulation of complex multi-Josephson-junction circuits has been developed. The analog contains only two types of special cicuits, A and B, interconnected with a simple high-frequency commutation circuit and several ordinary operational low-frequency amplifiers. With our present five-junction version of the analog, several problems of urgent interest have been solved, including those of chaos excitation in the double-junction interferometer and mutual phase locking in multi-tunnel-junction arrays.
Digital Josephson circuits that do not latch into the voltage state provide an opportunity for high-speed serial processing. These fast logic gates must ultimately generate and record small fast pulses generated by single fluxoid events. This is demonstrated in a concept for a high-speed analog-to-digital (A/D) converter. Low β-value unlatched SQUID's are used throughout for ultimate speed, sensitivity, and simplicity. The analog signal is quantized by a single-junction SQUID and converted into a pulse train resulting from fluxoid transitions. These are counted in a chain of bistable two-junction SQUID's which successively scale the pulse train by a factor 2. These SQUID's perform both logic and memory functions at the single fluxoid level. The bit count stored in the array is gated out each sampling interval to provide the digitized signal. The performance of this device has been simulated and criteria established for the unlatched SQUID design. These include dimensionality, impedance, damping, intra- and inter-SQUID delays and β factor. Large analog dynamic range is available with the high intrinsic linearity of the SQUID quantizer and a long chain of scalers.
High speed, single flux quantum (SFQ) binary scalers are important components in superconducting analog-to-digital converters (ADC). This paper reviews the concept for a SQUID ADC and the design of an SFQ binary ripple counter, and reports the simulation of key components, and fabrication and performance of non-latching SQUID scalers and SFQ binary ripple counters. The SQUIDs were fabricated with Nb/Nb2O5/PbIn junctions and interconnected by monolithic-superconducting transmission lines and isolation resistors. Each SQUID functioned as a bistable flip-flop with the input connected to the center of the device and the output across one junction. All junctions were critically damped to optimize the pulse response. Operation was verified by observing the do I-V curves of successive SQUIDs driven by a cw pulse train generated on the same chip. Each SQUID exhibited constant-voltage current steps at 1/2 the voltage of the preceding device as expected from the Josephson voltage-to-frequency relation. Steps were observed only for the same voltage polarity of successive devices and for proper phase bias of the SQUID. Binary frequency division was recorded up to 40GHz for devices designed to operate to 28GHz.