Towards scalable quantum computing based on silicon spin
Tristan Meunier, Louis Hutin, Benoît Bertrand, Yvain Thonnart, Gaël Pillonnet, G. Billiot, Helene Jacquinot, M. Cassé, Sylvain Barraud, Y.-J. Kim, V. Mazzocchi, Anthony Amisse, Heorhii Bohuslavskyi, L. Bourdet, Alessandro Crippa, X. Jehl, Romain Maurand, Yann‐Michel Niquet, M. Sanquer, Benjamin Venitucci, Baptiste Jadot, Emmanuel Chanrion, Pierre-André Mortemousque, Cameron Spence, Matias Urdampilleta, Silvano De Franceschi, M. Vinet
Quantum computing (QC) is expected to extend the high performance computing roadmap [1]-[2] at the condition to be able to run a large number of errorless quantum operations, typically. over a billion. It is out of reach in actual physical systems because of the quantum decoherence. As a consequence, quantum error correction techniques, which utilize the idea of redundant encoding, have been introduced to cure for the errors [3]-[5]. In state-of-the-art codes, with error thresholds or fidelities around 10-2in Si spin qubits, it is expected that logical qubits will be made out of a few thousands or more of physical qubits [6], bringing the number of required physical qubits to perform relevant quantum calculations to at least a million.
Quantum computing (QC) is expected to extend the high performance computing roadmap [1]-[2] at the condition to be able to run a large number of errorless quantum operations, typically. over a billion. It is out of reach in actual physical systems because of the quantum decoherence. As a consequence, quantum error correction techniques, which utilize the idea of redundant encoding, have been introduced to cure for the errors [3]-[5]. In state-of-the-art codes, with error thresholds or fidelities around 10-2in Si spin qubits, it is expected that logical qubits will be made out of a few thousands or more of physical qubits [6], bringing the number of required physical qubits to perform relevant quantum calculations to at least a million.
Quantum computers have gained widespread interest as they can potentially solve problems that are intractable even for today’s supercomputers, such as the simulation of quantum systems as initially proposed by Feynman. To achieve such tremendous progress, a quantum computer relies on processing the information stored in quantum bits (qubits), the fundamental units of quantum computation, similar to the bits in a classical (i.e., non-quantum) processor. In general, a quantum processor comprising several qubits is connected through a quantum-to-classical interface consisting of classical electrical circuits for manipulating and reading out their quantum state. The accuracy of an operation on a qubit is characterized using the fidelity, which is 100 % in case of a perfect operation. In practice, a fidelity between 99 % and 99.9 % is typically achieved in today’s experiments with less than 100 qubits, limited by non-idealities in the control signals and by the implementation of the physical qubit itself. Since such qubit fidelities are too low to execute relevant quantum algorithms, quantum error correction schemes have been developed which rely on a much larger number of qubits to correct for possible errors, resulting in the need for quantum processors with thousands or millions of qubits. Solid-state qubits promise the largescale integration required to scale to millions of qubits, as they exploit the lithographic fabrication techniques borrowed from the semiconductor industry. However, state-of-theart solid-state qubits, such as transmons and single-electron spin qubits, must be typically cooled to cryogenic temperatures in a dilution refrigerator to exhibit quantum behavior. Because of the limited number of qubits (< 100) in state-of-theart solid-state quantum processors, the classical controller is currently implemented by general-purpose instruments or by tailor-made controllers operating at room temperature connected via several wires to the qubits in the cryogenic chamber. However, these systems must scale to support millions of qubits. While scaling up the underlying quantum processor is already exceptionally challenging, building the electronics required to interface such a large-scale processor is just as relevant and arduous.
It is expected that a useful quantum computing (QC) system would require millions of qubits within one system. The state-of-the-arts QC systems contain hundreds of qubits, which is still several orders of magnitude away from the ultimate goal. To scale the QC system, namely, to increase the number of qubits and QC circuit layers, and also to improve the performance such as fidelity, robustness, etc., we need to develop scalable techniques including high-density qubit devices, ultra-low power qubit interfacing circuits, 3D interconnection and packaging etc. This article will review the recent reported device, circuit and system-level techniques that contribute to the QC system scaling and may ultimately lead to a fully functional quantum computer.
Qubits can be made out of a variety of experimental platforms, fig. 1. Small processors have already been demonstrated in trapped ions and superconductors but in both cases, the constraints for coherent manipulation and the effective large size of the qubits including all quantum functionalities are hardly compatible with very large-scale architecture. When it comes to the crucial issue of large-scale integration, Si spin qubits are well positioned due to their long coherence times and compatibility with semiconductor fabrication techniques. Indeed, dephasing times of the order of 1s have been achieved in Si-based spin qubits and single-qubit gate fidelities are high enough for scalable, fault-tolerant quantum computing.
Quantum computers offer the promise of accelerated solutions for types of problems that are computationally unaffordable or intractable for classical computers, such as the simulation of quantum mechanics itself, quantum chemistry, and mathematical challenges like factoring large numbers. However, the relatively high error rate per quantum computing operation in the systems of today and of those expected to be developed in the future remains a key obstacle. To address this challenge, quantum error correction (QEC), which enables the creation of error-corrected (logical) qubits from a collection of physical qubits, is required. Depending on the choice of QEC code, hundreds of physical qubits may be required to implement a single logical qubit. As a result, the race to the creation of quantum computing systems capable of outperforming classical computing systems is largely a race to create quantum computers at the scale needed to support QEC. The criticality of scaling is evident in the quantum computing roadmaps produced by major research labs in this field, such as the one from IBM shown in Fig. 1. Starting from systems with only a few physical qubits a few years ago, the roadmap projects quantum computers with around 100,000 physical qubits and thousands of logical qubits by 2033 or so.
Abstract The accumulation of physical errors 1–3 prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction 4 promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such that the physical errors are suppressed enough to allow running a desired computation with tolerable fidelity. Quantum error correction becomes practically realizable once the physical error rate is below a threshold value that depends on the choice of quantum code, syndrome measurement circuit and decoding algorithm 5 . We present an end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes 6 . Our approach achieves an error threshold of 0.7% for the standard circuit-based noise model, on par with the surface code 7–10 that for 20 years was the leading code in terms of error threshold. The syndrome measurement cycle for a length- n code in our family requires n ancillary qubits and a depth-8 circuit with CNOT gates, qubit initializations and measurements. The required qubit connectivity is a degree-6 graph composed of two edge-disjoint planar subgraphs. In particular, we show that 12 logical qubits can be preserved for nearly 1 million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of 0.1%, whereas the surface code would require nearly 3,000 physical qubits to achieve said performance. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors.
Quantum computing is the grand challenge of the 21st century and is poised to revolutionizes our daily lives on a nearly unfathomable level. To truly understand the impact, we must first build a universal, fully error corrected machine capable of exploring the application space envisioned by both academic and industry. Numerous pathways have been identified and demonstrated to fabricate single, unique qubits using a myriad of platforms (superconducting, ions, nanoparticles, photons, etc…). However, it is now widely accepted that a truly useful quantum computer will require millions of interconnected, identical qubits to perform fully error corrected, general purpose calculations. To that end, photon-based qubits offer a path to such a general-purpose machine by leveraging the mature silicon photonics high-volume manufacturing ecosystem. Creating quantum devices from silicon photonics components requires patterning innovation to bring leading-edge nanolithography to near macroscopic scale, a unique challenge for an industry where the future relies on progressive device shrink.