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Neural Network based Decoders for the Surface Code

Savvas Varsamopoulos

Published May 1, 2019• 1 citation
Publisher

Abstract

Quantum error correction (QEC) is key to have reliable quantum computation and storage, due to the fragility of qubits in current quantum technology and the imperfect application of quantum operations. In order to have efficient quantum computation and storage, active QEC is required. QEC consists of an encoding and a decoding process. The way that encoding protects quantum information is through grouping many unreliable physical qubits into one more reliable logical qubit. Then, computation occurs based on the logical qubits, however, errors still occur on the physical qubits. Decoding is the process of identifying the location and type of errors occurring on the physical qubits. The decoder proposes corrections against the errors that have been identified. In this thesis, we are exploring novel ways to design decoders for QEC codes, focusing on the surface code. We began our investigation by implementing a rule-based decoder for the smallest surface code, which consists of 17 qubits. We incorporated this decoder to a platform that we created, called Quantum Platform Development Framework (QPDO), in order to study the working principles of a Pauli frame and to quantify its potential effect on the decoding performance. The Pauli frame unit keeps track of errors on physical qubits without the need to apply corrections constantly. We quantified through simulation the benefits in terms of the decoding performance and the execution schedule of QEC, minimizing the idle time. Minimizing the execution time is critical, due to the limited time budget of quantum error correction, thus requiring a high speed decoder capable of still reaching high decoding performance. We show that when the decoding time is equal to the time required to run a surface code cycle, the decoder reaches its maximum performance. However, such a rule-based decoder cannot easily scale to larger quantum systems, therefore other decoding approaches should be considered. Most of the classical decoders that have been developed so far, do not have a good balance between short execution time and high decoding performance. Therefore, we proposed decoders that incorporate neural networks to keep the execution time small, while keeping the decoding performance high. We designed a two-module decoder, which included a classical module and a neural network. We named this configuration neural network based decoder (NNbD). We compare different designs of NNbDs with classical decoders and prove that NNbDs can reach similar or better decoding performance compared to classical decoders while having constant execution time. Furthermore, we quantified the execution time of a NNbD and argued about the speed that can be achieved in a hardware chip like a Field Programmable Gate Array (FPGA) or an Application-Specific Integrated Circuit (ASIC). Both the classical module and the neural network are highly parallelizable and fast modules by construction, leading to constant execution time for a given code distance. We proved that neural network based decoders can adapt to any noise model, since the neural network functionality is based on creating a map between the input and output data, requiring no knowledge about the underlying error model. Following that, a comparison between different NNbD design approaches was performed. We show that it is advantageous to start with a classical decoding module and improve on its decoding performance with a neural network rather than having a neural network perform the decoding on its own. Also, in the latter case, the execution time of such a decoder is non-constant and on average larger than the decoder containing a classical module and a neural network. Moreover, we show that for the design containing a classical module and a neural network, the execution time is increasing linearly as the code distance increased, which was mainly attributed to the increase of the size of the neural network. However, there is a fundamental difference between NNbDs and classical decoders in that NNbDs require sampling and training based on data obtained from the problem, unlike classical decoders. As the code distance increases, the amount of data required to be gathered and trained are exponentially increasing, imposing a limit to the size of the quantum system that can be efficiently decoded. We proposed as a solution to have a distributed decoding approach that divides the code into small regions and then decodes each region locally. We show that using such a distributed decoding approach for small code distances does not lead to significant loss in decoding performance, while simultaneously providing a way to decode large code distances. Thus, we were able to create a decoder that can achieve high decoding performance with constant execution time. However, there are still some issues to keep in mind with such kind of decoders. The main challenge of NNbDs is that they are a dedicated decoder for a given problem. Every time that some aspect of the problem changes (quantum error correcting code, code distance, error model), sampling, training and evaluating the decoder needs to be repeated. Moreover, there is a large number of neural network parameters that need to be specifically tuned when the problem changes. A careful study of the design choices is required to maximize the performance of the decoder. We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial.

DOI
10.4233/uuid:dc73e1ff-0496-459a-986f-de37f7f250c9

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Quantum error correction (QEC) is key to have reliable quantum computation and storage, due to the fragility of qubits in current quantum technology and the imperfect application of quantum operations. In order to have efficient quantum computation and storage, active QEC is required. QEC consists of an encoding and a decoding process. The way that encoding protects quantum information is through grouping many unreliable physical qubits into one more reliable logical qubit. Then, computation occurs based on the logical qubits, however, errors still occur on the physical qubits. Decoding is the process of identifying the location and type of errors occurring on the physical qubits. The decoder proposes corrections against the errors that have been identified. In this thesis, we are exploring novel ways to design decoders for QEC codes, focusing on the surface code. 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Furthermore, we quantified the execution time of a NNbD and argued about the speed that can be achieved in a hardware chip like a Field Programmable Gate Array (FPGA) or an Application-Specific Integrated Circuit (ASIC). Both the classical module and the neural network are highly parallelizable and fast modules by construction, leading to constant execution time for a given code distance. We proved that neural network based decoders can adapt to any noise model, since the neural network functionality is based on creating a map between the input and output data, requiring no knowledge about the underlying error model. Following that, a comparison between different NNbD design approaches was performed. We show that it is advantageous to start with a classical decoding module and improve on its decoding performance with a neural network rather than having a neural network perform the decoding on its own. Also, in the latter case, the execution time of such a decoder is non-constant and on average larger than the decoder containing a classical module and a neural network. Moreover, we show that for the design containing a classical module and a neural network, the execution time is increasing linearly as the code distance increased, which was mainly attributed to the increase of the size of the neural network. However, there is a fundamental difference between NNbDs and classical decoders in that NNbDs require sampling and training based on data obtained from the problem, unlike classical decoders. As the code distance increases, the amount of data required to be gathered and trained are exponentially increasing, imposing a limit to the size of the quantum system that can be efficiently decoded. We proposed as a solution to have a distributed decoding approach that divides the code into small regions and then decodes each region locally. We show that using such a distributed decoding approach for small code distances does not lead to significant loss in decoding performance, while simultaneously providing a way to decode large code distances. Thus, we were able to create a decoder that can achieve high decoding performance with constant execution time. However, there are still some issues to keep in mind with such kind of decoders. The main challenge of NNbDs is that they are a dedicated decoder for a given problem. Every time that some aspect of the problem changes (quantum error correcting code, code distance, error model), sampling, training and evaluating the decoder needs to be repeated. Moreover, there is a large number of neural network parameters that need to be specifically tuned when the problem changes. A careful study of the design choices is required to maximize the performance of the decoder. We envision that when sampling and training are performed in hardware, the time required for these processes will be decreased compared to the time required in software. Finally, if the hardware resources allow us to include multiple neural networks, then this can potentially increase the decoding performance. As we presented, dividing the task of decoding to smaller tasks that are distributed to many neural networks can be beneficial.
Quantum Error Correction (QEC) is required in quantum computers to mitigate the effect of errors on physical qubits. When adopting a QEC scheme based on surface codes, error decoding is the most computationally expensive task in the classical electronic back-end. Decoders employing neural networks (NN) are well-suited for this task but their hardware implementation has not been presented yet. This work presents a space exploration of fully-connected feed-forward NN decoders for small distance surface codes. The goal is to optimize the neural network for high decoding performance, while keeping a minimalistic hardware implementation. This is needed to meet the tight delay constraints of real-time surface code decoding. We demonstrate that hardware based NN-decoders can achieve high decoding performance comparable to other state-of-the-art decoding algorithms whilst being well below the tight delay requirements (440 ns) of current solid-state qubit technologies for both ASIC designs (<30 ns) and FPGA implementations (<90 ns). These results indicate that NN-decoders are viable candidates for further exploration of an integrated hardware implementation in future large-scale quantum computers.
Quantum error-correcting codes (QECCs) can eliminate the negative effects of quantum noise, the major obstacle to the execution of quantum algorithms. However, realizing practical quantum error correction (QEC) requires resolving many challenges to implement a high-performance real-time decoding system. Many decoding algorithms have been proposed and optimized in the past few decades, of which neural network (NNs) based solutions have drawn an increasing amount of attention due to their high efficiency. Unfortunately, previous works on neural decoders are still at an early stage and have only relatively simple architectures, which makes them unsuitable for practical QEC. In this work, we propose a scalable, fast, and programmable neural decoding system to meet the requirements of FTQEC for rotated surface codes (RSC). Firstly, we propose a hardware-efficient NN decoding algorithm with relatively low complexity and high accuracy. Secondly, we develop a customized hardware decoder with architectural optimizations to reduce latency. Thirdly, our proposed programmable architecture boosts the scalability and flexibility of the decoder by maximizing parallelism. Fourthly, we build an FPGA-based decoding system with integrated control hardware for evaluation. Our L=5L=5L=5 (LLL is the code distance) decoder achieves an extremely low decoding latency of 197 ns, and the L=7L=7L=7 configuration also requires only 1.136 μμμs, both taking 2L2L2L rounds of syndrome measurements. The accuracy results of our system are close to minimum weight perfect matching (MWPM). Furthermore, our programmable architecture reduces hardware resource consumption by up to 3.0×3.0\times3.0× with only a small latency loss. We validated our approach in real-world scenarios by conducting a proof-of-concept benchmark with practical noise models, including one derived from experimental data gathered from physical hardware.
Abstract. Suppressing qubit errors is one of the main challenges in building fault-tolerant quantum computers, requiring quantum error correction to protect fragile quantum information during computation cycles. The surface code is a leading approach because of its high error tolerance and compatibility with realistic hardware, but it requires a decoder that can accurately and quickly use the syndrome measurements to discern whether a logical error has occurred. This study investigates whether a feedforward neural-network can serve as a practical decoder for the surface code under circuit-level noise. Using the Stim software package, this study generates surface code circuits at multiple code distances and physical error rates and compiles them into detector samplers, then trains a PyTorch neural-network to predict whether a logical observable flip occurred from the syndrome data. The neural-network decoder is compared against Minimum-Weight Perfect Matching (MWPM), focusing on metrics including logical error rate and inference speed. The results show that the neural-network decoder performs competitively with MWPM for code distances 3 and 5 and provides inference time advantages at higher physical error rates as its inference time remains relatively constant over increasing physical error rates. However, MWPM outperforms the neural-network at distance 7, suggesting that scalability remains a major limitation for neural-network decoders. These results show that neural-networks are a promising approach for tackling quantum error correction, although future work is still needed to improve these models for real systems at larger code distances.
Quantum error correction (QEC) is essential for achieving low error rates required for fault-tolerant quantum computation. In stabilizer-based codes such as the surface code, errors are inferred from repeated syndrome measurements and corrected by a classical decoder. To prevent error accumulation, decoding must be performed with both high throughput and low latency to keep pace with the QEC cycle and enable real-time feedback for universal logical operations. Here we report a hardware-integrated control architecture featuring an FPGA-based neural-network (NN) decoder and experimentally demonstrate real-time surface-code (distance-3) QEC on a superconducting quantum processor. The system achieves a deterministic closed-loop latency of 550 ns, including 124 ns for NN decoding, enabling feedback corrections within a 1.25 us QEC cycle. We show that real-time decoding and feedback correction achieve logical performance comparable to offline decoding while maintaining robustness against varying error conditions. We further demonstrate mid-circuit feedback correction in non-Clifford logical circuits, where Pauli-frame updating alone becomes insufficient. Our results establish a low-latency hardware architecture for embedded QEC control and provide a pathway towards scalable fault-tolerant quantum computing systems.
Quantum computers has the potential to outperform classical computers for certain tasks, but the practical use of quantum computers is limited by noise and errors in quantum systems. Quantum Error Correction (QEC) provides a way for detecting and correcting these errors, but in the presence of complex and correlated noise, efficient decoding still remains a significant challenge. In this thesis, neural network-based decoders are explored as an approach to decode QEC data. In particular, recurrent neural network (RNN) architectures, including Gated Recurrent Unit (GRU) and Long Short-Term Memory (LSTM), are investigated as their are able to capture temporal dependencies and model sequential data. GRU and LSTM models are trained using the data generated with the help of the Stim simulator for quantum circuits that are based on experimental setups. The models are trained to classify error occurrences from detection event data and evaluated under different configurations, including varying number of rounds, code distance and input representation. The results show that both GRU and LSTM models can learn error patterns for shorter sequences and provide competitive decoding performance. However, for longer sequences the models struggle. Overall, this work demonstrates that relatively simple neural network models can be used as alternatives to traditional decoding methods and highlights the potential of machine learning approaches for improving quantum error correction.
Quantum error correction (QEC) is essential for quantum computing to mitigate the effect of errors on qubits, and surface code (SC) is one of the most promising QEC methods. Decoding SCs is the most computational expensive task in the control device of quantum computers (QCs), and many works focus on accurate decoding algorithms for SCs, including ones with neural networks (NNs). Practical QCs also require low-latency decoding because slow decoding leads to the accumulation of errors on qubits, resulting in logical failures. For QCs with superconducting qubits, a practical decoder must be very power-efficient in addition to having high accuracy and low latency. In order to reduce the hardware complexity of QC, we are supposed to decode SCs in a cryogenic environment with a limited power budget, where superconducting qubits operate. In this paper, we propose an NN-based accurate, fast, and low-power decoder capable of decoding SCs and lattice surgery (LS) operations with measurement errors on ancillary qubits. To achieve both accuracy and hardware efficiency of the SC decoder, we apply a binarized NN. We design a neural processing unit (NPU) for the decoder with SFQ-based digital circuits and evaluate it with a SPICE-level simulation. We evaluate the decoder performance by a quantum error simulator for the single logical qubit protection and the minimum operation of LS with code distances up to 13, and it achieves 2.5% and 1.0% accuracy thresholds, respectively.