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IEICE Technical Report; IEICE Tech. Rep.

Design of Single-Flux-Quantum Fundamental Gates Containing pi-Shifted Josephson Junctions

Yuki Yamanashi, Sotaro Nakaishi, Naoki Takeuchi, Yoshikawa Nobuyuki

Published Aug 2, 2018• 0 citations
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D. Sprungmann, K. Westerholt, H. Zabel

Verhandlungen der Deutschen Physikalischen Gesellschaft•Jan 1, 2007•0 citations
We designed several single flux quantum (SFQ) flip-flops and logic gates composed of Josephson junctions (JJs) and π-shifted JJs (π-JJs) to quantitatively evaluate effectiveness of introduction of π-JJs into the SFQ logic circuit. One-output flip-flops and logic gates were designed on the basis of the circuit design methodology we built for the SFQ circuit containing π-JJs. The designed flip-flops and logic gates have wide operating margins, the dc-bias margins of larger than ±30%, and device parameter margins of ±18%, though the static power consumption are reduced compared to conventional ones composed of JJs. We found that the difference in the critical current density between JJs and π-JJs does not affect the operating margins of the SFQ flip-flop composed of JJs and π-JJs. We devised a circuit structure of the delay flip-flop with complementary outputs composed of JJs and π-JJs (π-DFFC). The analog circuit simulation shows the dc-bias margin of the π-DFFC is larger than ±33%. These results indicate that the large-scale SFQ logic circuit system can be implemented using the flip-flops and logic gates containing π-JJs.
We present a concept of an advanced rapid single-flux-quantum (RSFQ) logic circuit family using the combination of 0-shifted and π-shifted Josephson junctions. A π-shift in the current-phase relationship can be obtained in several types of Josephson junctions, such as Josephson junctions containing a ferromagnet barrier layer, depending on its thickness and temperature. We use a superconducting quantum interference devices composed of a pair of 0- and π-shifted Josephson junctions (0-π SQUIDs) as a basic circuit element. Unlike the conventional RSFQ logic, bistability is obtained by spontaneous circular currents without using a large superconductor loop, and the state can be flipped by smaller driving currents. These features lead to energy- and/or space-efficient logic gates. In this paper, we show several example circuits where we represent signals by flips of the states of a 0-π SQUID. We obtained successful operation of the circuits from numerical simulation.