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IEEE Transactions on Applied Superconductivity

Degradation of Quality Factor of Superconducting Resonators by Remaining Metallic Film and Improved Fabrication Process Using Caldera Planarization

Tomoya Irimatsugawa, Hirotake Yamamori, Fuminori Hirayama, Shuichi Nagasawa, Go Fujii, Satoshi Kohjiro, Akira Sato, Daiji Fukuda, Mutsuo Hidaka, Yasushi Sato, Masashi Ohno, Hiroyuki Takahashi

Published Mar 18, 2019• 1 citation
Publisher

Abstract

An important figure of merit in microwave superconducting quantum interference device multiplexer (MW-MUX) is the quality factor of superconducting resonators. In advanced industrial science and technology (AIST), the intrinsic quality factor Qi of the resonators in the MW-MUX chips degraded significantly compared to those in the resonator-only chips owing to something during the fabrication process. In this study, we have investigated the damage process by conducting controlled experiments and an SEM-EDX analysis. As a result, we have confirmed that the metallic layers (Pd and Nb) were not removed completely and remained along the edge of the resonator, which resulted in the degradation of Qi. Further, we have invented a new process to overcome this imperfection during the removal of Pd layer using so called “caldera planarization”. The metal line that remained along the edge was not observed in the MW-MUX chips fabricated using this improved process. Finally, we have achieved Qi as high as that of resonator-only chips using the improved process.

DOI
10.1109/tasc.2019.2905144

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An important figure of merit in microwave superconducting quantum interference device multiplexer (MW-MUX) is the quality factor of superconducting resonators. In advanced industrial science and technology (AIST), the intrinsic quality factor Qi of the resonators in the MW-MUX chips degraded significantly compared to those in the resonator-only chips owing to something during the fabrication process. In this study, we have investigated the damage process by conducting controlled experiments and an SEM-EDX analysis. As a result, we have confirmed that the metallic layers (Pd and Nb) were not removed completely and remained along the edge of the resonator, which resulted in the degradation of Qi. Further, we have invented a new process to overcome this imperfection during the removal of Pd layer using so called “caldera planarization”. The metal line that remained along the edge was not observed in the MW-MUX chips fabricated using this improved process. Finally, we have achieved Qi as high as that of resonator-only chips using the improved process.
We developed a Nb 4-layer process for fabricating superconducting integrated circuits that involves using caldera planarization to increase the flexibility and reliability of the fabrication process. We call this process the planarized high-speed standard process (PHSTP). Planarization enables us to flexibly adjust most of the Nb and SiO2 film thicknesses; we can select reduced film thicknesses to obtain larger mutual coupling depending on the application. It also reduces the risk of intra-layer shorts due to etching residues at the step-edge regions. We describe the detailed process flows of the planarization for the Josephson junction layer and the evaluation of devices fabricated with PHSTP. The results indicated no short defects or degradation in junction characteristics and good agreement between designed and measured inductances and resistances. We also developed single-flux-quantum (SFQ) and adiabatic quantum-flux-parametron (AQFP) logic cell libraries and tested circuits fabricated with PHSTP. We found that the designed circuits operated correctly. The SFQ shift-registers fabricated using PHSTP showed a high yield. Numerical simulation results indicate that the AQFP gates with increased mutual coupling by the planarized layer structure increase the maximum interconnect length between gates.
Superconducting coplanar waveguide resonators are essential components in quantum processors, where their internal quality factor (Qi) constrains qubit coherence and readout fidelity. In niobium devices, microwave losses at millikelvin temperatures are strongly influenced by two-level systems (TLS) associated with the complex NbOx surface oxide. To mitigate these losses, we investigate a surface-engineering approach in which Nb films are capped in situ with a thin tantalum layer to suppress Nb2O5 formation and replace the native NbOx interface with a Ta-based oxide. We fabricate Nb/Ta bilayer and reference Nb resonators on high-resistivity silicon using identical DC sputtering and wet etching conditions, and characterize their performance at millikelvin temperatures. Fresh Ta-encapsulated devices exhibit internal quality factors up to 2.4 x 10^6 in the near-single-photon regime, with power dependence consistent with reduced TLS-related loss at the metal-air interface. A control Nb device fabricated under the same process shows comparatively lower Q_TLS, consistent with the beneficial effect of the Ta capping layer. Furthermore, ageing tests performed on Nb/Ta resonators after six months reveal a moderate reduction in Q_TLS relative to their initial values, yet the performance remains superior to newly fabricated Nb-only devices. These results suggest that thin Ta encapsulation enhances interface quality and contributes to improved temporal stability while remaining compatible with Nb-based fabrication workflows.
Niobium and aluminum have been widely used to realize superconducting resonators and qubits. However, the native oxide at the metal air interface limits the devices results. This layer is highly disordered, and it induces losses limiting the performances of the resonators or qubits. Recently, tantalum led to great improvement in qubit relaxation time. This improvement has been attributed to a thinner and less disordered oxide layer compared to Nb and Al. This study is aimed to limit the formation of the oxide layer, by the introduction of novel superconducting materials such as rhenium or by encapsulating the Nb surface with other superconducting materials such as Ta, Al, Re or other non-superconducting materials such as Au. To better understand the results, we are realizing these studies on coplanar waveguide resonators where the relation between surface losses and quality factor is clear. We are also analyzing different fabrication techniques to completely characterize our devices, linking material properties to the performances. In this work we are also varying the participation ratio of the devices in order to extract with higher fidelity and precision the losses introduced by the involved interfaces.
We present a specific method for fabrication of the original evaporation mask and characterisation of the superconduct- ing coplanar waveguide (CPW) resonators based on the shadow evaporation technique [1]. We show that silicon dioxide can be successfully removed by etching process in HF-based solutions. This treatment significantly increases the intrinsic quality factor Qi of the resonators and is also suitable for other superconducting structures operated at temperatures of the order of 20 mK. In this report we present a design of superconducting CPW resonators with a high quality factor to study fundamental problems of high kinetic inductance of aluminum ultra-thin films. Our kinetic inductance research was motivated by the necessity of ultra-short and high quality resonators which could be suitable for qubit systems. Also this kinetic inductance could be used in the development of parametric amplifiers [2] or new types of qubits based on quantum phase slip [3].
Superconducting resonators are central to superconducting quantum information technologies and essential for bosonic qubit architectures, where long-lived storage modes enable hardware-efficient error correction. Achieving ultra-high quality factors in scalable planar circuits is challenging because multiple dissipation channels contribute to the total loss. Here we report planar ααα-Ta resonators fabricated on 300 mm ultra-high-resistivity (>10>10>10 kΩΩΩ cm) intrinsic silicon using industrial processes, achieving median internal Q factors exceeding 40 million and maxima above 60 million. Energy-participation-ratio analysis identifies a dominant participation-controlled interface loss mechanism and places conservative upper bounds on substrate-associated dissipation. For the best-performing substrate, the inferred substrate loss tangent is below 1.0×10−81.0 \times 10^{-8}1.0×10−8, establishing industrial MCZ silicon among the lowest-loss substrate platforms reported for superconducting resonators. At the same time, the exceptionally low losses show no clear correlation with commonly cited silicon substrate metrics such as room-temperature resistivity or impurity concentrations. More broadly, these studies establish industrial 300 mm processing, careful interface engineering, and 300 mm MCZ silicon substrates as a promising platform for resonator-heavy superconducting quantum architectures with ultra-high quality factors.
Abstract Quantum bits (qubits) with long coherence times are an important element for the implementation of medium- and large-scale quantum computers. In the case of superconducting planar qubits, understanding and improving qubits’ quality can be achieved by studying superconducting planar resonators. In this paper, we fabricate and characterize coplanar waveguide resonators made from aluminum thin films deposited on silicon substrates. We perform three different substrate surface treatments prior to aluminum deposition: one chemical treatment based on a hydrofluoric acid clean; one physical treatment consisting of a thermal annealing at 880 °C in high vacuum; and one combined treatment comprising both the chemical and the physical treatments. The aim of these treatments is to remove the two-level state (TLS) defects hosted by the native oxides residing at the various samples’ interfaces. We first characterize the fabricated samples through cross-sectional tunneling electron microscopy, acquiring electron energy loss spectroscopy maps of the samples’ cross sections. These measurements show that both the chemical and the physical treatments almost entirely remove native silicon oxide from the substrate surface and that their combination results in the cleanest interface. Additionally, we analyze the effects of the various substrate treatments on the roughness of the silicon surface by means of atomic force microscopy surface morphology mapping. We then study the quality of the resonators by means of microwave measurements in the ‘quantum regime’, i.e., at a temperature T ∼ 10 mK and at a mean microwave photon number 〈 n ph 〉 ∼ 1 . In this regime, we find that both surface treatments independently improve the resonator’s intrinsic quality factor by ≈172%. The highest quality factor is obtained for the combined treatment, Q i ≈ 0.82 million, corresponding to an improvement by ≈256%. Finally, we find that the TLS quality factor averaged over a time period of 3 h is ∼3 million at 〈 n ph 〉 ∼ 10 , indicating that substrate surface engineering can potentially reduce the TLS loss below other losses such as quasiparticle loss and flux noise.