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Conference on Precision Electromagnetic Measurements

Fabrication and characterization of physically-linked large-scale josephson junction test arrays

Lanruo Wang, Jinjin Li, Wenhui Cao, Yuan Zhong, Xueshen Wang, Qing Zhong

Published Jul 1, 2018• 1 citation
Publisher

Abstract

The efforts of National Institute of Metrology (NIM) towards large scale Nb/ NbxSi1-x/Nb Josephson junction arrays for the quantum voltage standards are presented in this paper. Physically-linked arrays with 10,000 and 20,000 junctions (corresponding to 1 and 2 junctions vertically) are fabricated. DC I-V characteristics of different stacked arrays are measured and experimental results are discussed. Focusing ion beam (FIB) together with scanning electron microscope (SEM) are used to examine the cross-section of three types of junction stacks which vertically contains 2, 3, and 4 junctions respectively. It is shown that grain boundary defects in the niobium wiring layer exist for all of these junction stacks. A method which potentially could solve this problem is proposed.

DOI
10.1109/cpem.2018.8543119

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The efforts of National Institute of Metrology (NIM) towards large scale Nb/ NbxSi1-x/Nb Josephson junction arrays for the quantum voltage standards are presented in this paper. Physically-linked arrays with 10,000 and 20,000 junctions (corresponding to 1 and 2 junctions vertically) are fabricated. DC I-V characteristics of different stacked arrays are measured and experimental results are discussed. Focusing ion beam (FIB) together with scanning electron microscope (SEM) are used to examine the cross-section of three types of junction stacks which vertically contains 2, 3, and 4 junctions respectively. It is shown that grain boundary defects in the niobium wiring layer exist for all of these junction stacks. A method which potentially could solve this problem is proposed.
The design, fabrication, and the characterization of a 0.5-V Josephson junction array device are presented for the quantum voltage standards in the National Institute of Metrology (NIM) of China. The device consists of four junction arrays, each of which has 1200 3-stacked Nb/Nb x Si1−x /Nb junctions and an on-chip superconducting microwave circuit which is mainly a power divider enabling each Josephson array being loaded with an equal amount of microwave power. A direct current (dc) quantum voltage of about 0.5 V with a ∼1-mA current margin of the 1st quantum voltage step is obtained. To further prove the quality of NIM device, a comparison between the NIM device with the National Institute of Standards and Technology (NIST) programmable Josephson voltage standard (PJVS) system device is conducted. The difference of the reproduced 0.5-V quantum voltage between the two devices is about 0.55 nV, which indicates good agreement between the two devices. With the homemade device, we have realized a precise and applicable 0.5-V applicable-level quantum voltage.
Analysis of the Josephson junction yield in the National Institute of Standards and Technology 10 V Programmable Josephson Voltage Standard (PJVS) has been performed by fabricating and measuring over 25 million Nb/NbxSi1-x/Nb junctions. Using the 265 116 junctions per PJVS device, it was possible to measure Shapiro steps on current voltage curves and then estimate the number of single-junction defects within these long arrays. By comparing the results of a quantum-based measurement to a model simulating junction defects, the quantity and magnitude of a small number of junction defects can be estimated from an array of many thousands of junctions. Understanding the source of junction defects in the fabrication process is important for maximizing yield and uniformity, both of which directly relate to the current margin of the quantized voltage step. We have recently fabricated 18 imperfect but usable PJVS devices and 16 that were free from defects, many with n = 1 Shapiro step margins approximately equal to 2 mA. The best of these wafers had a junction defect density of around 3 in a million.
NIST is using and developing superconductor-normal metal-superconductor (SNS) Josephson arrays for both programmable DC and AC voltage standards. Increasing the output voltage is difficult because the output voltage per junction is small; hence series arrays with large numbers of junctions are needed. The best way to generate higher voltages and achieve the best operating margins for the broadband drive signals is by densely packing the junctions into shorter arrays. NIST has been working on stacked SNS junctions to achieve this goal. By stacking junctions in the array, more junctions may be placed per length, while preserving a lumped microwave element. In this paper we introduce our results on stacked SNS junctions using MoSi/sub 2/ and Ti as barrier materials. These barriers were chosen because they can be reactive-ion etched (RIE) in contrast to our standard PdAu barriers, which must be wet etched. Using RIE, alternating layers of barrier material and Nb may be etched in a single step. We indirectly quantify the junction uniformity in the arrays by measuring the current range of the constant-voltage steps when the arrays are biased with a microwave drive.
We have studied low-temperature electrical transport properties of nanoscale Nb∕(Al–)Al2O3∕Nb and NbN∕AlN∕NbN Josephson junctions (JJs) fabricated by focused-ion-beam (FIB) milling. This FIB fabrication process yields high-quality JJs whose superconducting gap energy agrees with the bulk value. In this paper, we report the improvement in the precision of the fabrication technology by employing a weaker ion beam current and by introducing a step of XeF2-gas-assisted milling, which allowed us to reduce the anodization voltage. For Nb JJs, we measured the current-voltage (I-V) characteristics of single-electron transistors (SETs) and examined the current observed within the superconducting energy gap. At finite voltages, we observed current peaks due to the Josephson-quasiparticle (JQP) cycle. Based on the JQP-peak positions, we estimated the charging energy Ec of the SETs. For all SETs, Ec∕kB is larger than 1K, which is consistent with 0.1×0.1μm2 junctions. We also analyzed the superconducting critical current at zero voltage. The ratio Ic∕Ic0 depended on the junction size, where Ic is the measured critical current and Ic0 is the theoretical one. The I-V curves of NbN single Josephson junctions also depended on the junction size, and they were qualitatively different, especially around the energy gap. We will discuss the possible origins for the junction-size dependence.
PTB started using the robust NbxSi1-xbarrier junction technology for the fabrication of large arrays for the Programmable Josephson Voltage Standard (PJVS) and for the Josephson Arbitrary Waveform Synthesizer 3 years ago. We demonstrate how Nb-doping of the amorphous Si barrier causes the transition from an underdamped to a desired overdamped junction behavior. Special dc SQUIDs have been used to evaluate junction capacitance and noise properties. The critical current of small junctions as a function of applied magnetic field has been investigated. On the basis of an existing 70 GHz design previously used for 10 V PJVS chips, we fabricated for the first time 20 V circuits with nearly 140 000 double-stacked Josephson junctions. A direct on-chip comparison between the two 10 V halves of the binary-divided array confirmed the metrological suitability of the 20 V circuits for dc and ac applications.
Abstract In this work, we present a detailed study of the electrical properties of stacked NbN/(TaN/NbN) N Josephson junctions. Cross-sectional scanning transmission electron microscopy analysis of the 5-stacked junction shows that the multilayer interface is very flat, each barrier has the same thickness, and the sidewalls of the junctions are nearly perpendicular to the substrate. Stacked junctions of different sizes and stacking numbers all have only one transition in their current–voltage curves. This indicates that the critical currents of the junctions in the stacked junctions are almost the same, showing the stability and repeatability of the multilayer fabrication and etching process. At 4.2 K, the 4-stacked junction shows excellent Josephson properties with characteristic voltage V c of 3.54 mV, which is about four times the 0.88 mV of the single junction. The temperature dependence of critical current density J c and V c of the stacked junction with N = 1, 2, 4 were measured, all of which can be fitted with dirty-limit theory. Stacked junctions with larger V c or more stacked layers can be achieved by optimizing electrode and barrier thickness, barrier resistivity, and thermal relaxation rate, etc.