This thesis mainly summarizes two experiments that relate to building a quantum computer out of superconducting transmon qubits. Transmon qubits have emerged as one of the foremost solid state qubits, realizing processors with more than ten qubits and demonstrating small scale quantum algorithms as well as quantum error correction schemes. Right now, there is a race between different academic and industry research groups to scale up transmon qubit processors. The first experiment was a demonstration of qubit control by selective broadcasting in order to reduce the scaling of expensive electronics with the number of qubits for individual single-qubit control. We demonstrated that we can bring two transmon qubits to the same frequency (combining fabrication accuracy and in-situ fine tuning) and use the same hardware to control both, routing the pulses with a nanosecond-timescale vector switch matrix. Despite the compromises required by this technique, we show a scalable path to single qubit control beyond the threshold required for quantum error correction. In benchmarking, we take into account gate leakage due to the fact that transmons are fundamentally multi-level systems. In the second experiment we establish entanglement between two transmon qubits on different chips. We use an entanglement by measurement scheme and demonstrate that we can overcome minor fabrication imperfections by shaping our measurement pulses. Ultimately, performance is mainly limited by photon loss between the chips and up to the amplification chain. This entanglement mediated by traveling photons could be used to make a distributed transmon processor where computations are spread across several chip modules. This modularity could enable connectivities that cannot be realized on chip and ease fabrication requirements, as modules could be individually fabricated and selected. Thus, both of these experiments fit into the larger effort to converge on the hardware, control equipment and architecture of a future large-scale transmon quantum computer. Other experiments I contributed to are summarized in the conclusion chapter to show the diverse physics that can be studied in cQED experiments.
This thesis mainly summarizes two experiments that relate to building a quantum computer out of superconducting transmon qubits. Transmon qubits have emerged as one of the foremost solid state qubits, realizing processors with more than ten qubits and demonstrating small scale quantum algorithms as well as quantum error correction schemes. Right now, there is a race between different academic and industry research groups to scale up transmon qubit processors. The first experiment was a demonstration of qubit control by selective broadcasting in order to reduce the scaling of expensive electronics with the number of qubits for individual single-qubit control. We demonstrated that we can bring two transmon qubits to the same frequency (combining fabrication accuracy and in-situ fine tuning) and use the same hardware to control both, routing the pulses with a nanosecond-timescale vector switch matrix. Despite the compromises required by this technique, we show a scalable path to single qubit control beyond the threshold required for quantum error correction. In benchmarking, we take into account gate leakage due to the fact that transmons are fundamentally multi-level systems. In the second experiment we establish entanglement between two transmon qubits on different chips. We use an entanglement by measurement scheme and demonstrate that we can overcome minor fabrication imperfections by shaping our measurement pulses. Ultimately, performance is mainly limited by photon loss between the chips and up to the amplification chain. This entanglement mediated by traveling photons could be used to make a distributed transmon processor where computations are spread across several chip modules. This modularity could enable connectivities that cannot be realized on chip and ease fabrication requirements, as modules could be individually fabricated and selected. Thus, both of these experiments fit into the larger effort to converge on the hardware, control equipment and architecture of a future large-scale transmon quantum computer. Other experiments I contributed to are summarized in the conclusion chapter to show the diverse physics that can be studied in cQED experiments.
Fixed-frequency transmon quantum computers (QCs) have advanced in coherence times, addressability, and gate fidelities. Unfortunately, these devices are restricted by the number of on-chip qubits, capping processing power and slowing progress toward fault-tolerance. Although emerging transmon devices feature over 100 qubits, building QCs large enough for meaningful demonstrations of quantum advantage requires overcoming many design challenges. For example, today’s transmon qubits suffer from significant variation due to limited precision in fabrication. As a result, barring significant improvements in current fabrication techniques, scaling QCs by building ever larger individual chips with more qubits is hampered by device variation. Severe device variation that degrades QC performance is referred to as a defect. Here, we focus on a specific defect known as a frequency collision. When transmon frequencies collide, their difference falls within a range that limits two-qubit gate fidelity. Frequency collisions occur with greater probability on larger QCs, causing collision-free yields to decline as the number of on-chip qubits increases. As a solution, we propose exploiting the higher yields associated with smaller QCs by integrating quantum chiplets within quantum multi-chip modules (MCMs). Yield, gate performance, and application-based analysis show the feasibility of QC scaling through modularity. Our results demonstrate that chiplet architectures, relative to monolithic designs, benefit from average yield improvements ranging from 9.6 – 92.6 × for ≲5 qubit machines. In addition, our simulations explore the design space of chiplet systems and discover configurations that demonstrate average two-qubit gate infidelity reductions that are at best 0.815 × their monolithic counterpart. Finally, we observe that carefully-selected modular systems achieve fidelity improvements on a range of benchmark circuits.
This thesis explores novel strategies for advancing superconducting quantum computing through a series of experimental investigations and device innovations. Grounded in the development of circuit quantum electrodynamics, the work addresses the challenges posed by the limitations of coherent control, coherence time and scaling of superconducting qubits. Focusing on transmon qubits, the thesis first reviews the foundational principles of circuit quantum electrodynamics and the critical role of the transmon in achieving robust qubit performance. Three experimental studies form the core of this work. The first study demonstrates a universal quantum gate set for strongly coupled transmons. By exploiting the residual ZZ interaction, the work introduces a novel two-axis gate protocol for single-qubit operations and implements both CZ and CNOT gates with high fidelities, highlighting the potential for fast, low-error quantum operations in the strong coupling regime. The second study investigates a dual-rail qubit architecture using parametrically coupled transmons, showcasing a hardware-efficient approach to quantum error correction. This experiment converts single-photon loss errors into detectable erasures and leverages mid-circuit detection to enhance qubit coherence, thereby advancing fault-tolerant quantum computing schemes in the NISQ era. The final study focuses on the development of merged-element transmons (MET) and their FinMET variants. By integrating the Josephson junction and shunt capacitor into a single trilayer device, these innovations achieve a dramatic reduction in device footprint while addressing loss channels through advanced materials engineering, ultimately paving the way for scalable, high-coherence quantum circuits. Collectively, these contributions demonstrate significant progress in quantum gate design, error mitigation, and qubit architecture, offering promising routes toward the realization of largescale, fault-tolerant quantum computers
The discovery of quantum mechanics in the 20th century forms the basis of many of the technologies that define our lives today. The ability to engineer and manipulate individual quantum systems -- even create artificial atoms -- promises a similar revolutionary leap in technology. A quantum technology of particular interest is quantum computing, which has the potential to solve problems that are intractable for classical computers, opening up new domains of computation. Meanwhile, an attractive approach to creating engineered quantum systems is circuit quantum electrodynamics (cQED). Where research initially focused on understanding the physics of cQED devices, focus has shifted to building systems capable of performing useful computations. However, this remains extremely challenging, in part due to the inherently fragile nature of the individual quantum bits, but also due to difficulties in controlling and scaling up these systems. This thesis focuses on the control aspects of building an extensible full-stack quantum computer based on superconducting transmon qubits. We define the demonstration of quantum fault-tolerance as our target application to give focus to our efforts. The QuSurf architecture for a full-stack quantum computer presented in this thesis is designed with this application in mind. We provide a detailed study of the error sources present in this system and give an overview of the relevant characterization techniques. In the second part of this thesis, we address several key challenges in the control of a quantum computer. To realize high-fidelity coherence limited gates, we present a novel tuneup protocol that achieves a tenfold speedup over the state-of-the-art. This is realized by eliminating the need for qubit initialization. We demonstrate this protocol by calibrating single-qubit gates to a coherence limited Clifford fidelity of 99.9% in one minute. Performing repeated parity checks, as is required for quantum error correction, requires reusing qubits quickly after they have been measured. By introducing a numerically optimized depletion pulse we are able to speeds up the depletion of measurement photons in a readout resonator without having to rely on specific symmetry conditions. Using this technique speed up photon depletion by more than six inverse resonator linewidths, reducing the error rate in an emulated ancilla parity check by a factor 75. Flux-pulsing based two-qubit gates are the fastest two-qubit gates. However, they are also very technically demanding. The key challenge in performing these gates is addressing the distortions that control signals experience as they traverse various electrical components. We have developed Cryoscope (short for cryogenic oscilloscope) to characterize and correct these distortions. Cryoscope is an in-situ technique that uses the qubit to sample control pulses of arbitrary shape. Even when correcting distortions to within sim0.1 two-qubit gates are history-dependent due to the long timescale upon which some of these distortions act. We have invented Net-Zero, a new type of flux-pulsing based two-qubit gate, to address this problem. It makes use of a symmetry condition of the transmon to have net-zero integral, making the gate resilient to long-timescale distortions. The gate suppresses leakage out of the computational subspace to 0.1% by making use of leakage interference and has a built-in echo effect that enhances the coherence of the gate, achieving a two-qubit gate fidelity of 99.1%. Custom software is required to perform the physics experiments needed to build and operate a quantum computer. PycQED is an open-source software framework we have developed for this purpose. We discuss the design choices and concepts of PycQED before turning our focus to characterization and calibration. Here we introduced dependency graphs as a useful abstraction and system emulation as an essential development tool for automating the characterization and calibration process. We conclude the thesis by reflecting on the limitations of our architecture and providing an outlook on the grand challenges of building a useful kilo-qubit sized quantum computer. We define these challenges as The Application Problem, The Fabrication Problem, and The Calibration Problem.
This work presents a conceptual architecture and technological roadmap for a scalable superconducting quantum computing platform based on modular design principles. Rather than introducing a new qubit technology, the proposal focuses on addressing critical engineering bottlenecks that currently limit the large-scale deployment of quantum processors, including wiring complexity, electromagnetic crosstalk, fabrication yield, and latency in error-correction feedback loops.The proposed framework introduces a modular hybrid architecture (“Quantum Mesh”), where medium-scale quantum chiplets containing 25–50 superconducting transmon qubits are interconnected through advanced 3D packaging and cryogenic infrastructure. This approach aims to improve manufacturing yield, reduce wiring density, and enable rack-level integration of quantum processing units while maintaining high gate fidelities and manageable thermal loads.A second central element of the proposal is the integration of a high-fidelity digital twin environment capable of simulating qubit dynamics, noise sources, control latency, and thermal constraints at nanosecond resolution. This predictive framework is intended to support hardware iteration cycles prior to fabrication, potentially accelerating design optimization and system validation.The document outlines a three-year development pathway targeting 100–200 physical qubits and several logical qubits using surface code error correction, followed by a longer-term scaling strategy toward quantum fabrics exceeding one thousand qubits. By combining modular quantum chiplets, partial cryogenic electronics, and predictive digital twin modeling, the proposed architecture explores a plausible industrial pathway toward large-scale quantum computing systems.
Quantum computers have gained widespread interest as they can potentially solve problems that are intractable even for today’s supercomputers, such as the simulation of quantum systems as initially proposed by Feynman. To achieve such tremendous progress, a quantum computer relies on processing the information stored in quantum bits (qubits), the fundamental units of quantum computation, similar to the bits in a classical (i.e., non-quantum) processor. In general, a quantum processor comprising several qubits is connected through a quantum-to-classical interface consisting of classical electrical circuits for manipulating and reading out their quantum state. The accuracy of an operation on a qubit is characterized using the fidelity, which is 100 % in case of a perfect operation. In practice, a fidelity between 99 % and 99.9 % is typically achieved in today’s experiments with less than 100 qubits, limited by non-idealities in the control signals and by the implementation of the physical qubit itself. Since such qubit fidelities are too low to execute relevant quantum algorithms, quantum error correction schemes have been developed which rely on a much larger number of qubits to correct for possible errors, resulting in the need for quantum processors with thousands or millions of qubits. Solid-state qubits promise the largescale integration required to scale to millions of qubits, as they exploit the lithographic fabrication techniques borrowed from the semiconductor industry. However, state-of-theart solid-state qubits, such as transmons and single-electron spin qubits, must be typically cooled to cryogenic temperatures in a dilution refrigerator to exhibit quantum behavior. Because of the limited number of qubits (< 100) in state-of-theart solid-state quantum processors, the classical controller is currently implemented by general-purpose instruments or by tailor-made controllers operating at room temperature connected via several wires to the qubits in the cryogenic chamber. However, these systems must scale to support millions of qubits. While scaling up the underlying quantum processor is already exceptionally challenging, building the electronics required to interface such a large-scale processor is just as relevant and arduous.
Current quantum processors are fragile, noisy and fairly limited in both quantity and quality with tens of qubits and physical error rates of around 10^-3. To realize practical quantum applications, however, error rates need to be below 10^-15 across millions of qubits. To bridge this gap and fully harness the potential of quantum computers, quantum error correction (QEC) is essential. QEC codes are designed to protect quantum information by redundantly encoding it onto multiple physical qubits. This encoding allows for the detection and correction of local errors affecting individual qubits, e.g., through stabilizer measurements. Importantly, if the physical error rates are below a specific threshold, QEC codes can exponentially suppress logical error rates by increasing the number of physical qubits involved. This is essential for achieving fault-tolerant computations, which are key to unlocking the full potential of quantum computers. The work presented in this thesis focuses on the implementation and optimization of small-scale QEC experiments using the surface code and flux-tunable superconducting qubits (Transmons). It addresses several key challenges: enhancing two-qubit gate fidelity in Surface-4 (Chapter 2), implementing an error-detection code with Surface-7 (Chapter 3), automating the calibration and benchmarking of the building blocks in Surface-17 (Chapter 4), reducing leakage into higher excited states with leakage reduction units (Chapter 5), assessing and enhancing the performance of logical qubits (Chapters 7 and 8).