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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Layout Synthesis for Topological Quantum Circuits With 1-D and 2-D Architectures

Yibo Lin, Bei Yu, Meng Li, David Zhigang Pan

Published Oct 6, 2017• 12 citations
Publisher

Abstract

Quantum computing has raised great interests for its potential to achieve an asymptotic speedup on specific problems. Current quantum devices suffer from noise which needs robust and scalable error-correcting schemes. Topological quantum error correction (TQEC) is among the most promising error-correcting techniques with exponential suppression of error with linear increase of space-time complexity. In this paper, we present the first work to explore space-time optimization between 1-D and 2-D architectures for TQEC circuits. We prove the NP-hardness of the qubit routing problem in the layout synthesis and propose an efficient algorithm to optimize space-time volumes for both 1-D and 2-D qubit architectures with promising experimental results.

DOI
10.1109/tcad.2017.2760511

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Quantum computing has raised great interests for its potential to achieve an asymptotic speedup on specific problems. Current quantum devices suffer from noise which needs robust and scalable error-correcting schemes. Topological quantum error correction (TQEC) is among the most promising error-correcting techniques with exponential suppression of error with linear increase of space-time complexity. In this paper, we present the first work to explore space-time optimization between 1-D and 2-D architectures for TQEC circuits. We prove the NP-hardness of the qubit routing problem in the layout synthesis and propose an efficient algorithm to optimize space-time volumes for both 1-D and 2-D qubit architectures with promising experimental results.
The topological quantum error correction (TQEC) scheme is promising for scalable and reliable quantum computing. A TQEC circuit can be modeled by a three-dimensional diagram, and the implementation resource of a TQEC circuit is abstracted to its space-time volume. Implementing a quantum algorithm with a reasonable physical qubit number and reasonable computation time is challenging for large-scale practical problems. Therefore, minimizing the space-time volume of a TQEC circuit becomes a crucial issue. Previous work shows that bridge compression can greatly compress TQEC circuits, but it was performed only manually. It is desirable to develop automated compression techniques for TQEC circuits to achieve low-overhead, large-scale quantum computations. In this paper, we present the first work that can automatically perform bridge compression on TQEC circuits. Compared with the state-of-the-art method, experimental results show that our proposed algorithm can averagely reduce space-time volumes by 83%.
Topological quantum error correction (TQEC) is promising for scalable fault-tolerant quantum computation. The required resource of a TQEC circuit can be modeled as its space-time volume of a three-dimensional geometric description. Implementing a quantum algorithm with a reasonable physical qubit number and computation time is challenging for large-scale complex problems. Therefore, it is desirable to minimize the space-time volume for large-scale TQEC circuits. Previous work proposed bridge compression, which can significantly compress a TQEC circuit, but it was performed manually. This article presents the first automated tool that can perform bridge compression on a large-scale TQEC circuit. Our proposed algorithm applies the bridge compression technique to compactify TQEC circuits with modularization. Besides, we offer a time-ordering-aware 2.5-D placement for compacting TQEC circuits and satisfying time-ordered measurement constraints. On the other hand, we suggest friend net-aware routing to effectively reduce the required routing resource under topological deformation. Compared with the state-of-the-art work, experimental results show that our proposed algorithm can averagely reduce space-time volumes by 84%.
This paper investigates the application of topological optimization techniques to enhance quantum error correction (QEC) coding. Traditional QEC schemes often face limitations in terms of redundancy and scalability. We propose a novel approach utilizing topological optimization to design the physical topology of QEC architectures, specifically focusing on qubit connectivity. The core claim is that through this optimization process, we can significantly improve both the error correction performance and the scalability of QEC codes. The underlying mechanism involves leveraging algorithms to iteratively refine the topological structure, minimizing unnecessary connections and maximizing the efficiency of the encoding process. The results demonstrate a potential pathway towards more robust and scalable quantum computers by fundamentally altering the design space for QEC. We present a theoretical framework and explore key considerations for implementing this approach, highlighting its potential to overcome the current constraints in QEC design. Our methodology provides a novel strategy for optimizing qubit interactions within a QEC system.
Topological quantum error correction (TQEC) is a promising method for fault-tolerant quantum circuits. A TQEC circuit can be visualized as the defect movement along the time axis and modeled as a 3D space-time volume to estimate the required resource. A quantum algorithm must minimize the space-time volume for a feasible physical qubit number and computational time, especially for large-scale designs. Previous work presents quadratic-time simultaneous primal and dual bridge compression for a TQEC circuit, which is infeasible for large-scale problems. This paper presents an efficient divide-and-conquer approach to primal and dual bridge compression, which can support different code distances between qubits. Compared with the previous work, experimental results show that our algorithm is effective and efficient even for large-scale problems.
Most quantum computing architectures can be realized as two-dimensional lattices of qubits that interact with each other. We take transmon qubits and transmission line resonators as promising candidates for qubits and couplers; we use them as basic building elements of a quantum code. We then propose a simple framework to determine the optimal experimental layout to realize quantum codes. We show that this engineering optimization problem can be reduced to the solution of standard binary linear programs. While solving such programs is a NP-hard problem, we propose a way to find scalable optimal architectures that require solving the linear program for a restricted number of qubits and couplers. We apply our methods to two celebrated quantum codes, namely the surface code and the Fibonacci code.
Building a quantum computer that is sufficiently large for solving classically intractable computational problem instances is a grand challenge of today's science. The main fundamental obstacle to construction of scalable quantum computers is the vulnerability of their extremely fragile components to noise and decoherence due to environment interaction. This paper focuses on design of technology-independent quantum circuit architectures that are scalable and reliable as well as well-suited for physical implementation. The considered architectures will be protected against errors by state-of-the-art topological quantum error-correcting (TQEC) codes which combine a number of properties enabling the best scalability among all discussed alternatives. The theory of TQEC is very mature, the suitable hardware has made significant progress in recent years, and therefore the software challenges constitute the research gaps. We explain the abstraction levels which lay the foundation for systematic, top-down design automation methods for TQEC computers, discuss the appropriate optimization objectives and formulate a number of largely open design automation problems in this fields.