Building a quantum computer that is sufficiently large for solving classically intractable computational problem instances is a grand challenge of today's science. The main fundamental obstacle to construction of scalable quantum computers is the vulnerability of their extremely fragile components to noise and decoherence due to environment interaction. This paper focuses on design of technology-independent quantum circuit architectures that are scalable and reliable as well as well-suited for physical implementation. The considered architectures will be protected against errors by state-of-the-art topological quantum error-correcting (TQEC) codes which combine a number of properties enabling the best scalability among all discussed alternatives. The theory of TQEC is very mature, the suitable hardware has made significant progress in recent years, and therefore the software challenges constitute the research gaps. We explain the abstraction levels which lay the foundation for systematic, top-down design automation methods for TQEC computers, discuss the appropriate optimization objectives and formulate a number of largely open design automation problems in this fields.
Building a quantum computer that is sufficiently large for solving classically intractable computational problem instances is a grand challenge of today's science. The main fundamental obstacle to construction of scalable quantum computers is the vulnerability of their extremely fragile components to noise and decoherence due to environment interaction. This paper focuses on design of technology-independent quantum circuit architectures that are scalable and reliable as well as well-suited for physical implementation. The considered architectures will be protected against errors by state-of-the-art topological quantum error-correcting (TQEC) codes which combine a number of properties enabling the best scalability among all discussed alternatives. The theory of TQEC is very mature, the suitable hardware has made significant progress in recent years, and therefore the software challenges constitute the research gaps. We explain the abstraction levels which lay the foundation for systematic, top-down design automation methods for TQEC computers, discuss the appropriate optimization objectives and formulate a number of largely open design automation problems in this fields.
Quantum computing is transitioning from laboratory research to industrial deployment, yet significant challenges persist: system scalability and performance, fabrication yields, and the advancement of algorithms and applications. We emphasize that in building quantum computers -- spanning quantum chips, system integration, instruction sets, algorithms, and middleware such as quantum error correction schemes -- design is everywhere. In this paper, we advocate for a holistic design perspective in quantum computing, a perspective we argue is pivotal to unlocking innovative co-design opportunities and addressing the aforementioned key challenges. To equip readers with sufficient background for exploring co-optimization opportunities, we detail how interconnected computational methods and tools collaborate to enable end-to-end quantum computer design. This coverage encompasses critical stages -- such as chip layout design automation, high-fidelity system-level simulation, Hamiltonian derivation for quantum system modeling, control pulse simulation, decoherence analysis, and physical verification and testing -- followed by quantum instruction set design. We then proceed to quantum system and software development, including quantum circuit synthesis, quantum error correction and fault tolerance, and logic verification and testing. Through these discussions, we illustrate with concrete examples -- including co-optimizing quantum instruction sets with algorithmic considerations, customizing error correction circuits to hardware-specific constraints, and streamlining quantum chip design through tailored code design, among others. We hope that the detailed end-to-end design workflow as well as these examples will foster dialogue between the hardware and software communities, ultimately facilitating the translation of meaningful research findings into future quantum hardware implementations.
Quantum computing is an emerging technology that has the potential to change the perspectives and applications of computing in general. A wide range of applications are enabled: from faster algorithmic solutions of classically still difficult problems to theoretically more secure communication protocols. A quantum computer uses the quantum mechanical effects of particles or particle-like systems, and a major similarity between quantum and classical computers consists of both being abstracted as information processing machines. Whereas a classical computer operates on classical digital information, the quantum computer processes quantum information, which shares similarities with analog signals. One of the central differences between the two types of information is that classical information is more fault-tolerant when compared to its quantum counterpart. Faults are the result of the quantum systems being interfered by external noise, but during the last decades quantum error correction codes (QECC) were proposed as methods to reduce the effect of noise. Reliable quantum circuits are the result of designing circuits that operate directly on encoded quantum information, but the circuit’s reliability is also increased by supplemental redundancies, such as sub-circuit repetitions. Reliable quantum circuits have not been widely used, and one of the major obstacles is their vast associated resource overhead, but recent quantum computing architectures show promising scalabilities. Consequently the number of particles used for computing can be more easily increased, and that the classical control hardware (inherent for quantum computation) is also more reliable. Reliable quantum circuits haev been investigated for almost as long as general quantum computing, but their limited adoption (until recently) has not generated enough interest into their systematic design. The continuously increasing practical relevance of reliability motivates the present thesis to investigate some of the first answers to questions related to the background and the methods forming a reliable quantum circuit design stack. The specifics of quantum circuits are analysed from two perspectives: their probabilistic behaviour and their topological properties when a particular class of QECCs are used. The quantum phenomena, such as entanglement and superposition, are the computational resources used for designing quantum circuits. The discrete nature of classical information is missing for quantum information. An arbitrary quantum system can be in an infinite number of states, which are linear combinations of an exponential number of basis states. Any nontrivial linear combination of more than one basis states is called a state superposition. The effect of superpositions becomes evident when the state of the system is inferred (measured), as measurements are probabilistic with respect to their output: a nontrivial state superposition will collapse to one of the component basis states, and the measurement result is known exactly only after the measurement. A quantum system is, in general, composed from identical subsystems, meaning that a quantum computer (the complete system) operates on multiple similar particles (subsystems). Entanglement expresses the impossibility of separating the state of the subsystems from the state of the complete system: the nontrivial interactions between the subsystems result into a single indivisible state. Entanglement is an additional source of probabilistic behaviour: by measuring the state of a subsystem, the states of the unmeasured subsystems will probabilistically collapse to states from a well defined set of possible states. Superposition and entanglement are the building blocks of quantum information teleportation protocols, which in turn are used in state-of-the-art fault-tolerant quantum computing architectures. Information teleportation implies that the state of a subsystem is moved to a second subsystem without copying any information during the process. The probabilistic approach towards the design of quantum circuits is initiated by the extension of classical test and diagnosis methods. Quantum circuits are modelled similarly to classical circuits by defining gate-lists, and missing quantum gates are modelled by the single missing gate fault. The probabilistic approaches towards quantum circuits are facilitated by comparing these to stochastic circuits, which are a particular type of classical digital circuits. Stochastic circuits can be considered an emulation of analogue computing using digital components. A first proposed design method, based on the direct comparison, is the simulation of quantum circuits using stochastic circuits by mapping each quantum gate to a stochastic computing sub-circuit. The resulting stochastic circuit is compiled and simulated on FPGAs. The obtained results are encouraging and illustrate the capabilities of the proposed simulation technique. However, the exponential number of possible quantum basis states was translated into an exponential number of stochastic computing elements. A second contribution of the thesis is the proposal of test and diagnosis methods for both stochastic and quantum circuits. Existing verification (tomographic) methods of quantum circuits were targeting the reconstruction of the gate-lists. The repeated execution of the quantum circuit was followed by different but specific measurement at the circuit outputs. The similarities between stochastic and quantum circuits motivated the proposal of test and diagnosis methods that use a restricted set of measurement types, which minimise the number of circuit executions. The obtained simulation results show that the proposed validation methods improve the feasibility of quantum circuit tomography for small and medium size circuits. A third contribution of the thesis is the algorithmic formalisation of a problem encountered in teleportation-based quantum computing architectures. The teleportation results are probabilistic and require corrections represented as quantum gates from a particular set. However, there are known commutation properties of these gates with the gates used in the circuit. The corrections are not applied as dynamic gate insertions (during the circuit’s execution) into the gate-lists, but their effect is tracked through the circuit, and the corrections are applied only at circuit outputs. The simulation results show that the algorithmic solution is applicable for very large quantum circuits. Topological quantum computing (TQC) is based on a class of fault-tolerant quantum circuits that use the surface code as the underlying QECC. Quantum information is encoded in lattice-like structures and error protection is enabled by the topological properties of the lattice. The 3D structure of the lattice allows TQC computations to be visualised similarly to knot diagrams. Logical information is abstracted as strands and strand interactions (braids) represent logical quantum gates. Therefore, TQC circuits are abstracted using a geometrical description, which allows circuit input-output transformations (correlations) to be represented as geometric sub-structures. TQC design methods were not investigated prior to this work, and the thesis introduces the topological computational model by first analysing the necessary concepts. The proposed TQC design stack follows a top-down approach: an arbitrary quantum circuit is decomposed into the TQC supported gate set; the resulting circuit is mapped to a lattice of appropriate dimensions; relevant resulting topological properties are extracted and expressed using graphs and Boolean formulas. Both circuit representations are novel and applicable to TQC circuit synthesis and validation. Moreover, the Boolean formalism is broadened into a formal mechanism for proving circuit correctness. The thesis introduces TQC circuit synthesis, which is based on a novel logical gate geometric description, whose formal correctness is demonstrated. Two synthesis methods are designed, and both use a general planar representation of the circuit. Initial simulation results demonstrate the practicality and performance of the methods. An additional group of proposed design methods solves the problem of automatic correlation construction. The methods use validity criteria which were introduced and analysed beforehand in the thesis. Input-output correlations existing in the circuit are inferred using both the graph and the Boolean representation. The thesis extends the TQC state-of-the-art by recognising the importance of correlations in the validation process: correlation construction is used as a sub-routine for TQC circuit validation. The presented cross-layer validation procedure is useful when investigating both the QECC and the circuit, while a second proposed method is QECC-independent. Both methods are scalable and applicable even to very large circuits. The thesis completes with the analysis of TQC circuit identities, where the developed Boolean formalism is used. The proofs of former known circuit identities were either missing or complex, and the presented approach reduces the length of the proofs and represents a first step towards standardising them. A new identity is developed and detailed during the process of illustrating the known circuit identities. Reliable quantum circuits are a necessity for quantum computing to become reality, and specialised design methods are required to support the quest for scalable quantum computers. This thesis used a twofold approach towards this target: firstly by focusing on the probabilistic behaviour of quantum circuits, and secondly by considering the requirements of a promising quantum computing architecture, namely TQC. Both approaches resulted in a set of design methods enabling the investigation of reliable quantum circuits. The thesis contributes with the proposal of a new quantum simulation technique, no
Designing and building scalable quantum circuits that can effectively apply quantum algorithms is essential to the quick development of quantum computing technology. With an emphasis on different architectures including superconducting qubits, trapped ions, and topological qubits, this study provides an overview of the state-of-the-art in quantum circuit design as of right now. We go over the fundamentals of designing scalable quantum circuits, stressing the significance of qubit connection, error correction, and coherence maintenance. The study also discusses the sophisticated materials development, lithography, and etching processes used in the construction of these quantum circuits. We hope to shed light on the future of quantum computation and the steps required to create workable, large-scale quantum processors by analyzing recent developments and lingering difficulties in scaling quantum circuits. the vital role that multidisciplinary cooperation plays in closing the gap between theoretical developments and experimental application, which eventually opens the door for the development of reliable quantum computing systems.
Recent progress in quantum information has led to the start of several large national and industrial efforts to build a quantum computer. Researchers are now working to overcome many scientific and technological challenges. The program's biggest obstacle, a potential showstopper for the entire effort, is the need for high-fidelity qubit operations in a scalable architecture. This challenge arises from the fundamental fragility of quantum information, which can only be overcome with quantum error correction. 1 In a fault-tolerant quantum computer the qubits and their logic interactions must have errors below a threshold: scaling up with more and more qubits then brings the net error probability down to appropriate levels needed for running complex algorithms. Reducing error requires solving problems in physics, control, materials and fabrication, which differ for every implementation. I explain here the common key driver for continued improvement - the metrology of qubit errors.
This review article provides a comprehensive overview of recent developments in the field of quantum error correction (QEC), which stands as one of the biggest challenges for quantum computing. The extreme sensitivity of quantum systems to environmental noise makes it difficult to build reliable and scalable quantum computers. Inspired by pioneering codes like those from Shor and Steane, this work discusses the most promising QEC approaches today, particularly topological codes such as surface codes and low-density parity-check (LDPC) codes. The paper delves into critical experimental successes from industry leaders like Google, IBM, and Quantinuum, including their ”below-threshold” error correction demonstrations and roadmaps for fault-tolerant systems. It also presents a comparative analysis between classical algorithms like Minimum-Weight Perfect Matching (MWPM) and newer, machine learning-based decoder approaches. The discussion section addresses open problems that need to be solved in the future, such as correlated noise, cryogenic control, and the creation of fault-tolerant logical gate sets. This review aims to summarize the current state of the QEC field, serving as a guiding resource for both academics and industry professionals in shaping future research and development strategies.
This review article provides a comprehensive overview of recent developments in the field of quantum error correction (QEC), which stands as one of the biggest challenges for quantum computing. The extreme sensitivity of quantum systems to environmental noise makes it difficult to build reliable and scalable quantum computers. Inspired by pioneering codes like those from Shor and Steane, this work discusses the most promising QEC approaches today, particularly topological codes such as surface codes and low-density parity-check (LDPC) codes. The paper delves into critical experimental successes from industry leaders like Google, IBM, and Quantinuum, including their ”below-threshold” error correction demonstrations and roadmaps for fault-tolerant systems. It also presents a comparative analysis between classical algorithms like Minimum-Weight Perfect Matching (MWPM) and newer, machine learning-based decoder approaches. The discussion section addresses open problems that need to be solved in the future, such as correlated noise, cryogenic control, and the creation of fault-tolerant logical gate sets. This review aims to summarize the current state of the QEC field, serving as a guiding resource for both academics and industry professionals in shaping future research and development strategies.