In recent years, Reversible Logic is becoming a prominent technology due to its power reduction capability in circuit designing, thus having applications in quantum computing. The reversible circuit is implemented using reversible quantum gates such as CNOT gate, Fredkin gate, Toffoli gate etc. Among the various combinational circuits, quantum multiplexer and de-multiplexer circuits are two of the most important circuits. In this paper, we have proposed generalized algorithms for the construction of Quantum multiplexers (QMUX) and demultiplexers (QDe-MUX) using universal Fredkin gate for any given number of select lines. Using these novel algorithms, any valid size of Quantum multiplexers (QMUX) and de-multiplexers (QDe-MUX) circuit can be generated.
In recent years, Reversible Logic is becoming a prominent technology due to its power reduction capability in circuit designing, thus having applications in quantum computing. The reversible circuit is implemented using reversible quantum gates such as CNOT gate, Fredkin gate, Toffoli gate etc. Among the various combinational circuits, quantum multiplexer and de-multiplexer circuits are two of the most important circuits. In this paper, we have proposed generalized algorithms for the construction of Quantum multiplexers (QMUX) and demultiplexers (QDe-MUX) using universal Fredkin gate for any given number of select lines. Using these novel algorithms, any valid size of Quantum multiplexers (QMUX) and de-multiplexers (QDe-MUX) circuit can be generated.
The technologies like quantum computing, Nanotechnology is emerging due to the greater research in reversible logic. It has the power reduction capability the same mechanism is also having in the quantum computing. Designing a quantum circuit among various combinational circuits the decoder has capability to change binary information of input lines to distinct output lines and also there are many applications where decoder is the main basic component. In this paper a comprehensive introduction of basic gates used to design n to 2nUniversal Quantum decoder, here n represents the no of inputs are mentioned. The proposed 2:4 decoder circuit is designed using a universal reversible Fredkin gates and Feynman gate. The proposed work is simulated using IBM Quantum Composer. In comparison to existing quantum decoders the proposed decoder design has optimum values in all the parameters considered.
Reversible circuit design can be applied in various emerging technologies such as quantum computing. Since researchers have proposed many building blocks and designed small circuits (e.g., reversible full adder) already, it is the time to design large-scale reversible circuits. This paper proposes a novel quantum reversible 32-bit MIPS register file for quantum computer processors. It presents a reversible 5-to-32 decoder, 32 reversible buffer registers, and two reversible 32-to-1 multiplexers, too. The proposed reversible decoder block, namely GH-DEC, and the proposed reversible multiplexer block, namely GH-MUX, use the Feynman, Toffoli, and Fredkin gates. They have been designed by a minimum number of constant inputs, number of garbage outputs, and quantum cost. Besides, output expressions of all the circuits are simplified to enhance the performance of proposed quantum design, considerably. Comparison results show that the proposed reversible design surpasses the existing works in terms of the number of constant inputs, number of garbage outputs, and quantum cost.
Algorithms specifically designed for quantum computers have been developed. In quantum circuits, the Feynman, Toffoli, and Fredkin gates are employed instead of traditional inputs such as AND, OR, NAND, NOR, XOR, and XNOR in combinational logic gates. The ability to convert quantum circuits into combinational logic circuits, or vice versa, is of utmost importance. This essay study (or paper) aims to demonstrates the process of deriving combinational logic circuits from reversible quantum circuits. To achieve this, the Quine-McCluskey technique was utilized along with state tables generated from the quantum circuits to obtain an optimal logic expression that serves as the basis for constructing the combinational logic circuit. The resultant obtained combinational logic circuit was implemented within the MATLAB Simulink environment, and state tables were obtained. A comparison was made between the state tables derived from the quantum circuit and the combinational circuit, yielding successful results.
Abstract In recent years, ternary reversible logic has become a promising paradigm for advancing low-power, high-performance quantum digital systems that preserve information and are energy efficient. This paper focuses on two primary objectives: first, the efficient realization of ternary reversible 3×1 3 × 1 multiplexers and 1×3 1 × 3 demultiplexers using quantum gates, specifically 1-qutrit Shift and 3-qutrit Controlled Feynman gates, and second, the design of generalized n×1 n × 1 multiplexers and 1×n 1 × n demultiplexers. The proposed 9×1 9 × 1 multiplexer we propose in this study has demonstrated notable improvements in terms of quantum cost (20%), depth (18%), number of constant inputs (60%), and garbage outputs (30%), while the proposed 1×9 1 × 9 demultiplexer shows a 20% reduction in quantum cost, a 18% reduction in depth, a 33% reduction in constant inputs, and a 50% reduction in garbage outputs, compared to the most efficient existing designs. These optimizations represent an important step forward in the development of more efficient ternary and quantum reversible logic circuits, advancing the scalability of quantum systems.
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate and the Fredkin gate. Our synthesis algorithm first finds a cascade of Toffoli and Fredkin gates with no backtracking and minimal look-ahead. Next we apply transformations that reduce the size of the circuit. Transformations are accomplished via template matching. The basis for a template is a network with m gates that realizes the identity function. If a sequence in the network to be synthesized matches more than half of a template, then a transformation that reduces the gate count can be applied. In this paper we show that Toffoli and Fredkin gates behave in a similar manner. Therefore, some gates in the templates may not need to be specified-they can match a Toffoli or a Fredkin gate. We formalize this by introducing the box gate. All templates with less than six gates are enumerated and classified. We synthesize all three input, three output reversible functions and compare our results to those obtained previously.
Reversible logic, also known as information lossless logic, is a promising technology that allows embedded data within circuits to be retrieved in case of failure.This study explores the use of reversible gates, such as Feynman gates, Toffoli gates, Fredkin gates, Peres gates, Double Feynman gates, NFT gates, DKG gates, and DFT gates, to construct logic circuits.These reversible logic gates can be effectively used for the implementation of any higher logic circuits-based applications.In the proposed paper the Arithmetic logic unit based on reversible logic hates is implemented in Verilog as well as IBM quantum software.The major applications of reversible logic gates include quantum computing, low power circuits, nano and CMOS technologies, photonics.In the last part of the paper the circuits implemented using Verilog and IBM quantum a chip level design using Cadance layout is implemented.