Novel parity-preserving reversible logic array multipliers

Novel Optimum Parity-Preserving Reversible Multiplier Circuits

Fault Tolerant Parity Preserving Reversible Logic

Designing of Parity Preserving Reversible Vedic Multiplier

Designing Parity Preserving Reversible Circuits

Design and Implementation of Efficient Vedic Multiplier Using Reversible Logic

A new design of parity-preserving reversible multipliers based on multiple-control toffoli synthesis targeting emerging quantum circuits