Fault-tolerant quantum computing requires high-fidelity quantum gates that are resilient to control errors and device imperfections. Here, we develop energy-optimal control pulses for single-qubit gates that are simultaneously robust against frequency detuning and waveform inhomogeneities while also suppressing leakage outside the computational subspace. Combining the optimized pulse envelopes with an adaptive control scheme, we experimentally demonstrate optimal robust gates on a superconducting quantum processor. For a gate duration of 90ns, we achieve fidelities above 99.9% for the X gate and 99.6% for Hadamard-type gates. For the X gate, we maintain fidelities above 99.5% for simultaneous drive-amplitude variations up to 20% and qubit detuning up to 4 MHz. This robustness outperforms that of conventional Gaussian pulses by an order of magnitude, without much difference in peak gate fidelity. These results establish a route towards robust single-qubit control in large-scale quantum processors, advancing the development of fault-tolerant quantum computing.
Achieving high-fidelity single-qubit gates, two-qubit gates, and qubit readout is critical for building scalable, error-corrected quantum computers. However, device parameters that enhance one operation often degrade the others, making simultaneous optimization challenging. Here, we demonstrate that careful tuning of qubit-coupler coupling strengths in a superconducting circuit with two transmon qubits coupled via a tunable coupler enables high-fidelity single- and two-qubit gates, without compromising readout performance. Furthermore, we introduce a new calibration protocol for diabatic controlled- Z gates, phased-averaged leakage error amplification (PALEA), which enables efficient suppression of coherent gate errors and leakage to noncomputational states. Using PALEA in combination with careful tuning of qubit-coupler coupling strengths, we achieve a 40 h-averaged CZ gate fidelity of 99.93 %, simultaneous single-qubit gate fidelities of 99.98 %, and readout fidelities over 99.94 % in a single device. Our results demonstrate a viable path toward scaling up superconducting quantum processors while maintaining consistently high gate and readout fidelities.
Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.
Hybrid superconducting architectures combining different types of qubits offer a promising platform for exploiting their complementary advantages, yet high-fidelity entangling gates remain challenging because of strong nonlinearities and residual qubit-qubit interactions. Here, we propose a high-fidelity controlled-Z (CZ) gate for a hybrid circuit comprising a fluxonium qubit, a fixed-frequency transmon qubit, and a flux-tunable transmon coupler. By modulating only the external magnetic flux applied to the coupler, the qubit-qubit interaction is dynamically engineered for conditional-phase accumulation while the residual interaction is suppressed at idle, mitigating spectator-induced errors. We employ a low-dimensional Fourier-cosine pulse parameterization and a physically motivated cost function to independently suppress conditional-phase errors and leakage from the computational subspace. Numerical simulations demonstrate that a microwave-free CZ gate can be realized within
25ns, with an average gate fidelity exceeding
99.99% and leakage below
10−5. Using experimentally relevant superconducting-qubit parameters and accounting for decoherence, the proposed scheme maintains a CZ-gate fidelity of approximately
99.9%. We further extend the analysis to larger coupled architectures and find that the CZ-gate infidelity remains below
10−4 in the presence of spectator qubits. These results establish single-parameter flux control as a simple and robust approach for realizing high-fidelity entangling gates in heterogeneous superconducting quantum architectures.