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IEEE Transactions on Applied Superconductivity

Demonstration of Signal Transmission between Adiabatic Quantum-Flux-Parametrons and Rapid Single-Flux-Quantum Circuits Using Superconductive Microstrip Lines

Fumihiro China, Naoki Tsuji, Tatsuya Narama, Naoki Takeuchi, Thomas Ortlepp, Yuki Yamanashi, Nobuyuki Yoshikawa

Published Jan 1, 2016• 16 citations
Publisher

Abstract

We have been investigating interface circuits between rapid single-flux-quantum circuits and adiabatic quantum-flux-parametron (AQFP) circuits for use in high-speed low-power hybrid computing system. These interface circuits also enable us to use long-distance interconnections between AQFP gates. In this study, we fabricated and demonstrated AQFP circuits, including long interconnections of passive transmission lines (PTLs), in which the interface circuits were used to convert the signal currents of the AQFP gates into single-flux-quantum pulses traveling along PTLs. The length of each PTL was approximately 4.3 mm. During low-speed measurements, correct operations with wide bias margins were confirmed.

DOI
10.1109/tasc.2016.2642046

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We have been investigating interface circuits between rapid single-flux-quantum circuits and adiabatic quantum-flux-parametron (AQFP) circuits for use in high-speed low-power hybrid computing system. These interface circuits also enable us to use long-distance interconnections between AQFP gates. In this study, we fabricated and demonstrated AQFP circuits, including long interconnections of passive transmission lines (PTLs), in which the interface circuits were used to convert the signal currents of the AQFP gates into single-flux-quantum pulses traveling along PTLs. The length of each PTL was approximately 4.3 mm. During low-speed measurements, correct operations with wide bias margins were confirmed.
We investigated interface circuits between rapid single-flux-quantum (RSFQ) circuits and adiabatic quantum-flux-parametron (AQFP) circuits for a high-speed and low-power hybrid computing system. In addition, the interface circuits allow us to use long-distance interconnections based on single-flux-quantum (SFQ) passive transmission lines between AQFP gates. The target frequency of interface circuits is several gigahertz. There are two types of interface circuits. The RSFQ/AQFP interface circuit, which transmits a signal from RSFQ circuits to AQFP gates, was realized by coupling an RSFQ toggle flip-flop (TFF) to an AQFP buffer gate. The simulated bias margins of the RSFQ TFF and the excitation current margin of the RSFQ/AQFP interface were 2.22 mA ± 24.7% and 1.71 mA ± 25.0%, respectively. The AQFP/RSFQ interface circuit, which transmits a signal from AQFP gates to RSFQ circuits, was designed by using a high-sensitive magnetically coupled dc/SFQ converter (MC-dc/SFQ) to detect an output current of an AQFP buffer gate. The simulated bias margins of the MC-dc/SFQ and the excitation current margin of the AQFP/RSFQ interface were 0.558 mA ± 20.5% and 1.95 mA ± 36.1%, respectively. We also fabricated and measured the interface circuits.
We investigated interface circuits between a single-flux-quantum (SFQ) circuit and an adiabatic quantum-flux-parametron (AQFP) for their hybrid system. The target frequency of interface circuits is several GHz. The interface circuit that transmits a signal from the SFQ circuit to the AQFP gate (SFQ/AQFP) is realized by combining an SFQ toggle flip-flop (TFF) with the AQFP buffer. The bias margin of the SFQ TFF and the excitation current margin of the SFQ/AQFP interface are 2.47 mV ±24.7% and 1.36 mA ±8.82%, respectively. The interface circuit that transmits a signal from the AQFP to the SFQ circuit (AQFP/SFQ) was designed by using a high-sensitive mutually coupled dc/SFQ converter (MC-dc/SFQ) to detect magnetic flux signal output from the AQFP. The bias margin of the high-sensitive MC-dc/SFQ and the excitation current margin of the AQFP/SFQ are 2.88 mV ±13% and 1.6 mA ±18.8%, respectively. These interface circuits also allow us to use long-distance interconnection based on SFQ passive transmission lines between AQFP gates.
Each superconductor logic family has distinct features and advantages. For instance, adiabatic quantum-flux-parametron (AQFP) circuits operate with very high energy efficiency, and rapid single-flux-quantum (RSFQ) circuits operate at very high clock frequencies. To build a hybrid system that combines the above advantages, we propose a compact interface between AQFP and RSFQ circuits that converts current signals in AQFP logic into flux signals in RSFQ logic using a non-adiabatic quantum-flux-parametron gate. Compared to a previously proposed AQFP/RSFQ interface, the proposed interface has far fewer Josephson junctions (4 vs. 11). We optimize the circuit parameters of the AQFP/RSFQ interface and demonstrate the interface at low speed as proof of concept. Furthermore, we demonstrate data propagation between AQFP circuits along a long passive transmission line via the AQFP/RSFQ interface at low speed to show that the AQFP/RSFQ interface can alleviate the interconnect length limit in AQFP circuits.
In this paper, we designed and demonstrated interface circuits between AQFP (adiabatic quantum-flux-parametron) and RSFQ (rapid single-flux-quantum) circuits according to the established AQFP and RSFQ cell libraries using the MIT LL SFQ5ee process. The principles of these interfaces are based on ones that were previously designed and demonstrated using a four-metal-layer superconductor process. The AQFP-to-RSFQ interface is based on an RSFQ comparator, where an output current from an AQFP buffer is converted to an SFQ pulse output. The RSFQ-to-AQFP interface is based on an RSFQ D flip-flop, where the internal state of the D flip-flop is read out by an AQFP buffer. Thanks to the eight-metal-layer process, the interfaces can be designed with reduced circuit area compared to original designs with the four-metal-layer process. We designed, fabricated, and tested an AQFP-RSFQ hybrid multiplexer test circuit as an example of utilization of the interfaces, which results in correct operation with reasonably wide bias margins in low-frequency tests.
Various superconductor logic families have been proposed to build energy-efficient digital systems. Each logic family has its respective advantages and disadvantages, so in some systems, it is crucial to combine different superconductor logic families. We previously developed adiabatic quantum-flux-parametron (AQFP)/rapid single-flux-quantum (RSFQ) hybrid systems, such as a readout circuit for superconducting photon detectors and a flux-bias circuit for superconducting quantum bits. To facilitate the design of AQFP/RSFQ hybrid systems, here we propose a self-resetting RSFQ-to-AQFP (SR-R2A) interface as a compact signal converter from RSFQ logic into AQFP logic. The SR-R2A interface comprises an RSFQ latch and an AQFP comparator, where the AQFP comparator detects the flux state of the RSFQ latch. A previously proposed RSFQ-to-AQFP (R2A) interface requires single-flux-quantum clock signals to reset the flux state of the RSFQ part in the R2A interface, whereas the SR-R2A interface does not require such signals because the excitation current for the AQFP part also resets the flux state of the RSFQ latch. This feature allows the SR-R2A to be incorporated into AQFP/RSFQ hybrid systems without hardware overhead. We demonstrate an SR-R2A interface chip, fabricated with the AIST 10-kA/cm2Nb high-speed standard process, at 4.2 K in liquid helium. The experimental results indicate reasonably wide operating margins for the excitation currents and bias voltage for the SR-R2A interface.
We developed a design approach for interface circuits to connect Single Flux Quantum (SFQ) cells by using passive transmission lines (PTL's). In the approach, an interface circuit between a PTL and JTL is optimized to obtain a standard interface circuit, and then, modifications are made to previously designed SFQ cells and the standard interface circuit to connect the SFQ cells by using PTL's. The key point is the use of approximately the same interface circuit with every SFQ cell to maintain the matching condition between the interface circuit and the PTL's. Based on this approach, we designed an interface circuit and a test circuit composed of two D-flip-flops connected using 2-mm-long PTL's via the interface circuits. The impedance of the PTL was 2 /spl Omega/. We achieved high-speed operation of the test circuit up to 35 GHz with a bias margin of -15/+30%.