For quantum computing to become viable, the inherently fallible nature of qubits must be overcome with quantum error correction (QEC). QEC requires coherent qubits, in a configuration compatible with a given QEC scheme, and quantum logic operations with sufficiently low error. In this thesis, we perform a series of targeted experiments to achieve these goals on a path toward realizing the surface code QEC scheme. We first develop the Xmon variant of the transmon qubit, a highly coherent, planar, and frequency tunable superconducting qubit. With coherence demonstrated, we build an array of five Xmon qubits in a configuration compatible with the surface code, and demonstrate quantum logic operations with sufficiently low error to employ the surface code. These logic gates are characterized with randomized benchmarking, a protocol for determining gate error. We find applications of randomized benchmarking beyond the intended use in gate optimization and decoherence characterization, in addition to exploring the fundamental assumptions of randomized benchmarking. Lastly, we build a nine qubit Xmon transmon array and demonstrate correction of environmental bit-flip errors in a precursor to the surface code.
For quantum computing to become viable, the inherently fallible nature of qubits must be overcome with quantum error correction (QEC). QEC requires coherent qubits, in a configuration compatible with a given QEC scheme, and quantum logic operations with sufficiently low error. In this thesis, we perform a series of targeted experiments to achieve these goals on a path toward realizing the surface code QEC scheme. We first develop the Xmon variant of the transmon qubit, a highly coherent, planar, and frequency tunable superconducting qubit. With coherence demonstrated, we build an array of five Xmon qubits in a configuration compatible with the surface code, and demonstrate quantum logic operations with sufficiently low error to employ the surface code. These logic gates are characterized with randomized benchmarking, a protocol for determining gate error. We find applications of randomized benchmarking beyond the intended use in gate optimization and decoherence characterization, in addition to exploring the fundamental assumptions of randomized benchmarking. Lastly, we build a nine qubit Xmon transmon array and demonstrate correction of environmental bit-flip errors in a precursor to the surface code.
Quantum computers have the potential to solve problems which are classically intractable. Superconducting qubits present a promising path to building such a computer. Recent experiments with these qubits have demonstrated the principles of quantum error correction, quantum simulation, quantum annealing, and more. Current research with superconducting qubits is focused on two primary goals: creating a fully fault tolerant logical qubit out of many physical qubits using surface code error correction, and demonstrating an exponential speedup over any classical computer for a well-defined computational problem. To achieve either of these goals requires high precision control of three components: single qubit gates, two qubit gates, and qubit measurement. In this thesis, we use randomized benchmarking to characterize single qubit gates with 99.95\\% fidelity and two qubit gates wiht 99.5\\% fidelity in superconducting transmon qubits. In addition, we use standard decoherence measurements as well as newly developed extensions of randomized benchmarking to determine the limiting sources of error. Finally, we explore the surprisingly complicated dynamics of measuring the transmon state through a coupled resonator, and show that fully understanding this process requires breaking a few "standard" assumptions.
Current quantum processors are fragile, noisy and fairly limited in both quantity and quality with tens of qubits and physical error rates of around 10^-3. To realize practical quantum applications, however, error rates need to be below 10^-15 across millions of qubits. To bridge this gap and fully harness the potential of quantum computers, quantum error correction (QEC) is essential. QEC codes are designed to protect quantum information by redundantly encoding it onto multiple physical qubits. This encoding allows for the detection and correction of local errors affecting individual qubits, e.g., through stabilizer measurements. Importantly, if the physical error rates are below a specific threshold, QEC codes can exponentially suppress logical error rates by increasing the number of physical qubits involved. This is essential for achieving fault-tolerant computations, which are key to unlocking the full potential of quantum computers. The work presented in this thesis focuses on the implementation and optimization of small-scale QEC experiments using the surface code and flux-tunable superconducting qubits (Transmons). It addresses several key challenges: enhancing two-qubit gate fidelity in Surface-4 (Chapter 2), implementing an error-detection code with Surface-7 (Chapter 3), automating the calibration and benchmarking of the building blocks in Surface-17 (Chapter 4), reducing leakage into higher excited states with leakage reduction units (Chapter 5), assessing and enhancing the performance of logical qubits (Chapters 7 and 8).
Quantum error correction (QEC) is one of the crucial building blocks for developing quantum computers that have significant potential for reaching a quantum advantage in applications. Prominent candidates for QEC are stabilizer codes for which periodic readout of stabilizer operators is typically implemented via successive two-qubit entangling gates, and is repeated many times during a computation. To improve QEC performance, it is thus beneficial to make the stabilizer readout faster and less prone to fault-tolerance-breaking errors. Here we design a 3-qubit CZZ gate for superconducting transmon qubits that maps the parity of two data qubits onto one measurement qubit in a single step. We find that the gate can be executed in a duration of 35ns with a fidelity of F=99.96%. To optimize the gate, we use an error model obtained from the microscopic gate simulation to systematically suppress Pauli errors that are particularly harmful to the QEC protocol. Using this error model, we investigate the implementation of this 3-qubit gate in a surface code syndrome readout schedule. We find that for the rotated surface code, the implementation of CZZ gates increases the error threshold by nearly 50\% to ≈1.2% and decreases the logical error rate, in the experimental relevant regime, by up to one order of magnitude, compared to the standard CZ readout protocol. We also show that for the unrotated surface code, strictly fault-tolerant readout schedules can be found. This opens a new perspective for below-threshold surface-code error correction, where it can be advantageous to use multi-qubit gates instead of two-qubit gates to obtain a better QEC performance.
Quantum computing holds the promise of solving problems that are intractable for classical computers, with applications ranging from optimization and materials simulation to cryptography. It achieves this by leveraging the exponentially scaling dimensionality of the space encoding quantum information and by executing algorithms on quantum registers in superposition states – a feature often referred to as quantum parallelism. However, while encoding information in computational units capable of exploring a continuous set of quantum states enables exponential scaling of computational power with system size, quantum systems are also more susceptible to errors than their classical counterparts. These errors take the form of both control errors, where miscalibration of the control pulses causes coherent errors on the qubit states, as well as incoherent errors due to energy relaxation and dephasing. Scaling quantum systems to run useful algorithms involving hundreds or thousands of logical qubits will require quantum error correction. In this approach, quantum information is redundantly encoded across an entangled state of many physical qubits. This has enabled experimental demonstrations across various platforms – including ion traps, superconducting circuits, and neutral atoms – showing that encoded quantum states can be preserved beyond the coherence times of the constituting physical qubits. However, quantum state preservation is only one component needed for scalable quantum computing. To execute algorithms, it is also necessary to implement quantum gates on and between encoded qubits, in a way that maintains fault tolerance by preserving the ability to correct errors as they occur during the computation. In the first part of this thesis, we demonstrate the implementation of an error-corrected quantum operation that entangles two logical qubits. This is achieved by performing lattice surgery on a distance-three surface code qubit, resulting in a logical Bell state encoded in distance-three repetition codes, which enable the correction of single bit-flip errors. We further introduce techniques to benchmark and characterize the performance of logical operations, including applying the protocol to arbitrary logical input states and performing logical quantum process tomography. Together, these results constitute one of the first realizations of error-corrected lattice surgery in superconducting circuits. While quantum error correction can correct errors provided they occur with sufficiently low frequency, it may fail when many qubits experience errors simultaneously. In the second part of this thesis, we therefore shift focus to a specific error mechanism known to cause correlated errors in superconducting circuits – quasiparticle-induced decoherence. In this case, various forms of energy deposition on the quantum device can break Cooper pairs into quasiparticles, which may subsequently diffuse to the tunnel junction and interact with the qubit state, thereby causing decoherence. In this thesis, we investigate the impact of quasiparticle tunneling on qubit performance, with a focus on infrared-induced quasiparticles. We compare the sensitivity of niobium-based qubits to those made from tantalum – a material that has gained interest in recent years following demonstrations of qubits with improved coherence times based on this material. Using a thermal radiator source, we show that the performance of tantalum qubits may be limited by infrared-induced quasiparticles in typical superconducting circuit experimental setups. By employing both ambient and in-line infrared filters, we investigate the effectiveness of different filtering strategies and develop best practices for engineering cryogenic environments for superconducting quantum processors. The results presented in this thesis contribute to the advancement of quantum computing based on superconducting circuits by implementing and characterizing quantum error-corrected operations, and by investigating quasiparticles as a source of decoherence, along with strategies to improve infrared filtering and signal conditioning in cryogenic environments for future fault-tolerant quantum computing.
Superconducting qubits are a leading platform for quantum computation, yet decoherence and scalability challenges continue to limit progress toward fault-tolerant systems. This review synthesizes research on architectures, noise sources, and error correction to clarify performance trade-offs and guide development. The transition from Transmon to Fluxonium has dramatically improved qubit performance, achieving millisecond-scale coherence times. However, this success reveals a fundamental limit of coherence now being primarily restricted by the physical properties of the materials, specifically dielectric losses occurring at the Josephson junction leads and within the surrounding materials. As overcoming these material limits becomes increasingly difficult, system-level engineering determines whether high-coherence qubits can scale.Scaling quantum systems is difficult because current cooling and control systems create too much heat and this forces a shift to integrated digital superconducting circuits and cryogenic light-based links. While these hardware challenges restrict scaling, experiments in error correction show that logical qubits can already outperform physical ones. For example, a distance-7 surface code improved logical qubit lifetime by 2.4×. Achieving practical fault tolerance, however, requires moving beyond simple error models. Future systems must combine techniques like Dynamical Decoupling and Machine Learning-based Optimal Control with dynamic classical control capable of handling complex, correlated faults such as Multi-Bit Burst Errors. Progress in materials, cryogenic system integration for control, and adaptive error management must advance together to realize scalable, high-fidelity quantum hardware.
This thesis explores novel strategies for advancing superconducting quantum computing through a series of experimental investigations and device innovations. Grounded in the development of circuit quantum electrodynamics, the work addresses the challenges posed by the limitations of coherent control, coherence time and scaling of superconducting qubits. Focusing on transmon qubits, the thesis first reviews the foundational principles of circuit quantum electrodynamics and the critical role of the transmon in achieving robust qubit performance. Three experimental studies form the core of this work. The first study demonstrates a universal quantum gate set for strongly coupled transmons. By exploiting the residual ZZ interaction, the work introduces a novel two-axis gate protocol for single-qubit operations and implements both CZ and CNOT gates with high fidelities, highlighting the potential for fast, low-error quantum operations in the strong coupling regime. The second study investigates a dual-rail qubit architecture using parametrically coupled transmons, showcasing a hardware-efficient approach to quantum error correction. This experiment converts single-photon loss errors into detectable erasures and leverages mid-circuit detection to enhance qubit coherence, thereby advancing fault-tolerant quantum computing schemes in the NISQ era. The final study focuses on the development of merged-element transmons (MET) and their FinMET variants. By integrating the Josephson junction and shunt capacitor into a single trilayer device, these innovations achieve a dramatic reduction in device footprint while addressing loss channels through advanced materials engineering, ultimately paving the way for scalable, high-coherence quantum circuits. Collectively, these contributions demonstrate significant progress in quantum gate design, error mitigation, and qubit architecture, offering promising routes toward the realization of largescale, fault-tolerant quantum computers