There is a growing research interest in quantum computing because of its promise to provide significant performance speedups over classical computers at specialized tasks. While there have been many advances in building more capable, robust, and useful quantum algorithms and software, it is not clear how a scalable, high-performance, and area-efficient quantum architecture should be designed for efficient execution of various quantum workloads. This paper attempts to fill this gap by performing a detailed characterization of many real-world quantum algorithms on SIMDstyle quantum architectures. Specifically, we characterize the effect of size and the number of SIMD regions of a quantum SIMD architecture on various metrics such as performance, utilization, qubit (data) movement etc. We hope that the presented insights on the trade-offs and relationships between aforementioned evaluation metrics will be useful towards designing an efficient and scalable quantum architecture.
There is a growing research interest in quantum computing because of its promise to provide significant performance speedups over classical computers at specialized tasks. While there have been many advances in building more capable, robust, and useful quantum algorithms and software, it is not clear how a scalable, high-performance, and area-efficient quantum architecture should be designed for efficient execution of various quantum workloads. This paper attempts to fill this gap by performing a detailed characterization of many real-world quantum algorithms on SIMDstyle quantum architectures. Specifically, we characterize the effect of size and the number of SIMD regions of a quantum SIMD architecture on various metrics such as performance, utilization, qubit (data) movement etc. We hope that the presented insights on the trade-offs and relationships between aforementioned evaluation metrics will be useful towards designing an efficient and scalable quantum architecture.
This paper presents the design of scalable quantum networks that utilize optical switches to interconnect multiple quantum processors, facilitating large-scale quantum computing. By leveraging these novel architectures, we aim to address the limitations of current quantum processors and explore the potential of quantum data centers. We provide an in-depth analysis of these architectures through the development of simulation tools and performance metrics, offering a detailed comparison of their advantages and trade-offs. We hope this work serves as a foundation for the development of efficient and resilient quantum networks, designed to meet the evolving demands of future quantum computing applications.
Modular quantum processor architectures are envisioned as a promising solution for the scalability of quantum computing systems beyond the Noisy Intermediate Scale Quantum (NISQ) era. Based upon interconnecting tens to hundreds of quantum processors (i.e cores) via quantum coherent and classical links, this approach unravels the pressing limitations of densely qubit-packed monolithic processors, mainly by mitigating the requirements of qubit control and enhancing qubit isolation. Therefore, this new architectural design enables executing large-scale algorithms in a distributed manner. In order to assess the performance and optimize such architectures, it is crucial to analyze the quantum state transfers occurring via inter-core communication networks, referred to as inter-core qubit traffic. This would provide insights to improve the software and hardware stack for multi-core quantum computers. To this aim, we present a characterization of the spatio-temporal inter-core qubit traffic for different large-scale quantum algorithms. The programs are compiled on an all-to-all connected multi-core architecture that supports up to around 1000 qubits. We characterize the qubit traffic based on multiple performance metrics to assess the computational process and the communication overhead. Based on the showcased results, we conclude on the parallelization and scalability of presented algorithms, qualitatively evaluate the resource requirements as we scale circuit sizes, and lay the foundations of application-oriented benchmarking of large-scale multi-core architectures.
Quantum computing has the potential to solve complex problems that are outside the scope of classical systems, making it a standard shifter. Current devices, which are considered as Noisy Intermediate-Scale Quantum (NISQ) systems, are insufficient in their practical utility due to hardware limitations, error rates, and qubit counts. The dynamic growths wanted to exceed the NISQ era and grow scalable quantum algorithms and architectures that can achieve useful quantum benefit in real-world applications are reviewed in this research. This research gives a comprehensive examination of the complications in scaling quantum systems, adjacent resource efficacy, qubit connectivity, and error correction. In addition to connecting architectural innovations like modular quantum computing, error-resilient circuit design, and distributed quantum systems, the paper provides new hybrid quantum-classical algorithms planned to exploit performance in noisy environments. Results from benchmarking in arenas like machine learning, optimization, and quantum chemistry show how these methods can provide short-term quantum benefit. Lastly, this paper proposes a research roadmap for quantum computing that highlights the requirement of co-designing algorithms, software, and hardware. The goal of this effort is to straighten the progress of quantum systems that can resolve problems in the real world at scale by addressing the inadequacies of NISQ devices and emphasizing scalable solutions.
Quantum computing (QC) offers huge promise to accelerate a range of computationally intensive benchmarks. Quantum computing is limited, however, by the challenges of decoherence: i.e., a quantum state can only be maintained for short windows of time before it decoheres. While quantum error correction codes can protect against decoherence, fast execution time is the best defense against decoherence, so efficient architectures and effective scheduling algorithms are necessary. This paper proposes the Multi-SIMD QC architecture and then proposes and evaluates effective schedulers to map benchmark descriptions onto Multi-SIMD architectures. The Multi-SIMD model consists of a small number of SIMD regions, each of which may support operations on up to thousands of qubits per cycle.
Background: Traditional computer architectures are based on classical computational techniques, challenged by rapid advances in quantum computing. Quantum computers use quantum bits (qubits) to do calculations at speeds unreachable by classical computers, possibly revolutionizing many fields by providing exponential improvements in processing power. Objective: The article aims to investigate the potential consequences of quantum computing on traditional computer architectural models, emphasizing integration issues and transformative powers. Methods: We conducted extensive literature reviews and simulations to compare the performance of quantum and classical computing architectures in various computational workloads. Key performance metrics were developed to evaluate the scalability, efficiency, and feasibility of incorporating quantum computing principles into existing architectural models. Results: The findings indicate that quantum computing has the potential to improve significantly processing speeds and efficiency for specific algorithmic procedures, particularly cryptography and large-scale data analysis. However, modern quantum computers have hurdles in terms of error rates and qubit coherence times, complicating their integration with standard architectures. Conclusion: While quantum computing represents a paradigm change with promising improvements in computational speed and efficiency, significant technological advances are needed before it can be fully integrated into existing computer architecture models. Continued research and development are required to overcome these hurdles and realize quantum computing's full promise in improving traditional computing systems.
In the span of four decades, quantum computation has evolved from an intellectual curiosity to a potentially realizable technology. Today, small-scale demonstrations have become possible for quantum algorithmic primitives on hundreds of physical qubits. Nevertheless, there are significant outstanding challenges in quantum hardware, fabrication, software architecture, and algorithms on the path towards a full-stack scalable quantum computing technology. Here, we provide a comprehensive review of these scaling challenges. We show how to facilitate scaling by adopting existing semiconductor technology to build much higher-quality qubits, employing systems engineering approaches, and performing distributed heterogeneous quantum-classical computing. We provide a detailed resource and sensitivity analysis for quantum applications on surface-code error-corrected quantum computers given current, target, and desired hardware specifications based on superconducting qubits, accounting for a realistic distribution of errors. We provide comprehensive resource estimates for several utility-scale applications including quantum chemistry calculations, catalyst design, NMR spectroscopy, and Fermi-Hubbard simulation. We show that orders of magnitude enhancement in performance could be obtained by a combination of hardware improvements and tight quantum-HPC integration. Furthermore, we introduce high-performance architectures for quantum-probabilistic computing with custom-designed accelerators to tackle today's industry-scale classical optimization, machine learning, and quantum simulation tasks in a cost-effective manner.