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Computer Engineering and Applications Journal

Memory System of Quantum Computer Based on Classical Memory

Xuejun Yang

Published Jan 1, 2006• 0 citations
OpenAlex

Abstract

Quantum computer has many different properties,which make its performance greater than classical computer. But because of these specific properties brought by quantum mechanics,quantum computer is different from classical computer in design method.When we use classical memory hierarchy in quantum computer,we will meet some problems that will not be met in classical computer.This paper proposes a solution for this problem so that quantum computer can get a memory hierarchy structure to improve performance,similar to classical computer.Finally,this paper analyzes the performance of the model proposed above,and gives the condition in which the model has the greatest performance.

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Quantum computer has many different properties,which make its performance greater than classical computer. But because of these specific properties brought by quantum mechanics,quantum computer is different from classical computer in design method.When we use classical memory hierarchy in quantum computer,we will meet some problems that will not be met in classical computer.This paper proposes a solution for this problem so that quantum computer can get a memory hierarchy structure to improve performance,similar to classical computer.Finally,this paper analyzes the performance of the model proposed above,and gives the condition in which the model has the greatest performance.
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The resulting architectures overcome the primary challenges of reliability and scalability at the cost of physically unacceptable system area. We find that by exploiting the natural serialization at both the application and the physical microarchitecture level of a quantum computer, we can reduce the area requirement while improving performance. In particular we present a scalable quantum architecture design that employs specialization of the system into memory and computational regions, each individually optimized to match hardware support to the available parallelism. Through careful application and system analysis, we find that our new architecture can yield up to a factor of thirteen savings in area due to specialization. In addition, by providing a memory hierarchy design for quantum computers, we can increase time performance by a factor of eight. This result brings us closer to the realization of a quantum processor that can solve meaningful problems
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The resulting architectures overcome the primary challenges of reliability and scalability at the cost of physically unacceptable system area. We find that by exploiting the natural serialization at both the application and the physical microarchitecture level of a quantum computer, we can reduce the area requirement while improving performance. In particular we present a scalable quantum architecture design that employs specialization of the system into memory and computational regions, each individually optimized to match hardware support to the available parallelism. Through careful application and system analysis, we find that our new architecture can yield up to a factor of thirteen savings in area due to specialization. In addition, by providing a memory hierarchy design for quantum computers, we can increase time performance by a factor of eight. This result brings us closer to the realization of a quantum processor that can solve meaningful problems.
Qubit models and methods for improving the performance of software and hardware for analyzing digital devices through increasing the dimension of the data structures and memory are proposed.The basic concepts, terminology and definitions necessary for the implementation of quantum computing when analyzing virtual computers are introduced.The investigation results concerning design and modeling computer systems in a cyberspace based on the use of two-component structure <memory -transactions> are presented.
Quantum data structures, methods, algorithms and software applications for parallel solution of combinatorial problems, including design and test, on classical computers by using extra memory are proposed. Quantum models and methods for design and test of specific logic functionalities are developed based on the use of vector qubit data structures and memory-driven architectures for parallel computing algorithms, in order to significantly improve the performance of testing and deductive simulation of digital systems-on-chips. A new quantum method of test generation for single stuck-at faults of logic functions through taking Boolean derivatives with respect to their qubit coverages is proposed. The quantum method of deductive simulation of stuck-at faults of logical functions through the synthesis of matrices of Boolean derivatives with respect to their qubit coverage has been developed. The performance of methods for test synthesis and their analysis has no analogues in algorithmic performance.
Memory is an indispensable component in classical computing systems. While the development of quantum computing is still in its early stages, current quantum processing units mainly function as quantum registers. Consequently, the actual role of quantum memory in future advanced quantum computing architectures remains unclear. With the rapid scaling of qubits, it is opportune to explore the potential and feasibility of quantum memory across different substrate device technologies and application scenarios. In this paper, we provide a full design stack view of quantum memory. We start from the elementary component of a quantum memory device, quantum memory cells. We provide an abstraction to a quantum memory cell and define metrics to measure the performance of physical platforms. Combined with addressing functionality, we then review two types of quantum memory devices: random access quantum memory (RAQM) and quantum random access memory (QRAM). Building on top of these devices, quantum memory units in the computing architecture, including building a quantum memory unit, quantum cache, quantum buffer, and using QRAM for the quantum input-output module, are discussed. We further propose the programming model for the quantum memory units and discuss their possible applications. By presenting this work, we aim to attract more researchers from both the Quantum Information Science (QIS) and classical memory communities to enter this emerging and exciting area.