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Scalable Designs for Planar Ion Trap Arrays

Richard E. Slusher

Bulletin of the American Physical SocietyMar 5, 20070 citations

An Optimum Method for a Grooved 2D Planar Ion Trap Design

Wei-Bang Ji, Jinyin Wan, Hua-Dong Cheng +1 more

We investigate an effective grooved 2D ion chip design and optimize the ratio between the size of the rf electrodes and the groove. We calculate the optimal size of the groove using the analytical model, which was introduced by House, and the optimum result is obtained. We also obtain the simulated scattering points with the finite element analysis method. The analytical curve and simulated scattering points are coincident with each other. It is shown that this analytical model also fits for the grooved planar ion chip. Thus the optimum grooved 2D planar ion chip design could be obtained. It is effective for scalable quantum information processing.We investigate an effective grooved 2D ion chip design and optimize the ratio between the size of the rf electrodes and the groove. We calculate the optimal size of the groove using the analytical model, which was introduced by House, and the optimum result is obtained. We also obtain the simulated scattering points with the finite element analysis method. The analytical curve and simulated scattering points are coincident with each other. It is shown that this analytical model also fits for the grooved planar ion chip. Thus the optimum grooved 2D planar ion chip design could be obtained. It is effective for scalable quantum information processing.

Chinese Physics LettersJul 1, 20113 citations

A Scalable Microfabricated Ion Trap for Quantum Information Processing

Peter Maunz, Raymond A. Haltli, Andrew E Hollowell +7 more

Bulletin of the American Physical SocietyMay 25, 20160 citations

A grooved planar ion trap design for scalable quantum information processing

Wei-Bang Ji, Jinyin Wan, Hua-Dong Cheng +1 more

We describe a new electrode design for a grooved surface-electrode ion trap, which is fabricated in printed-circuit-board technology with segmented electrodes. This design allows a laser beam to get through the central groove to avoid optical access blocking and laser scattering from the ion trap surface. The confining potentials are modeled both analytically and numerically. We optimize the radio frequency (rf) electrodes and dc electrodes to achieve the maximum trap depth for a given ion height above the trap electrodes. We also compare our design with the reality ion chip MI I for practical considerations. Comparison results show that our design is superior to MI I. This ion trap design may form the basis for large scale quantum computers or parallel quadrupole mass spectrometers.We describe a new electrode design for a grooved surface-electrode ion trap, which is fabricated in printed-circuit-board technology with segmented electrodes. This design allows a laser beam to get through the central groove to avoid optical access blocking and laser scattering from the ion trap surface. The confining potentials are modeled both analytically and numerically. We optimize the radio frequency (rf) electrodes and dc electrodes to achieve the maximum trap depth for a given ion height above the trap electrodes. We also compare our design with the reality ion chip MI I for practical considerations. Comparison results show that our design is superior to MI I. This ion trap design may form the basis for large scale quantum computers or parallel quadrupole mass spectrometers.

Chinese Physics BJun 1, 20122 citations

Scalable digital hardware for a trapped ion quantum computer

Emily Mount, Daniel Gaultney, Geert Vrijsen +8 more

arXiv:1504.00035Quantum Information ProcessingSep 29, 201524 citations

Planar ion chip design for scalable quantum information processing

Jinyin Wan, Wang Yu-Zhu, Liang Liu

We investigate a planar ion chip design with a two-dimensional array of linear ion traps for scalable quantum information processing. Qubits are formed from the internal electronic states of trapped 40 Ca + ions. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate separately, a combination of appropriate rf and DC potentials is applied to them for stable ion confinement. Every two adjacent electrodes can generate a linear ion trap in and between the electrodes above the chip at a distance dependent on the geometrical scale and other considerations. The potential distributions are calculated by using a static electric field qualitatively. This architecture provides a conceptually simple avenue to achieving the microfabrication and large-scale quantum computation based on the arrays of trapped ions.We investigate a planar ion chip design with a two-dimensional array of linear ion traps for scalable quantum information processing. Qubits are formed from the internal electronic states of trapped 40 Ca + ions. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate separately, a combination of appropriate rf and DC potentials is applied to them for stable ion confinement. Every two adjacent electrodes can generate a linear ion trap in and between the electrodes above the chip at a distance dependent on the geometrical scale and other considerations. The potential distributions are calculated by using a static electric field qualitatively. This architecture provides a conceptually simple avenue to achieving the microfabrication and large-scale quantum computation based on the arrays of trapped ions.

Chinese Physics BOct 1, 20084 citations

Scalable Grooved Planar Ion Chip Design for Quantum Information Processing

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