On-chip hybrid system utilizing photon-mediated coupling between magnon and superconducting qubit is proposed in this paper. By integrating a magnetic thin film in the z -axis with superconducting circuits, quantum operations between two-level magnon modes and qubit are enabled without increasing the circuit footprint, controlled by external magnetic field. Physical parameters of the coupled system are obtained using the proposed Multiphysics model following our design framework. Finally, we demonstrated the behavior of the system and performed quantum operations based on the Hamiltonian model.
We present a device demonstrating a lithographically patterned transmon integrated with a micromachined cavity resonator. Our two-cavity, one-qubit device is a multilayer microwave integrated quantum circuit (MMIQC), comprising a basic unit capable of performing circuit-QED (cQED) operations. We describe the qubit-cavity coupling mechanism of a specialized geometry using an electric field picture and a circuit model, and finally obtain specific system parameters using simulations. Fabrication of the MMIQC includes lithography, etching, and metallic bonding of silicon wafers. Superconducting wafer bonding is a critical capability that is demonstrated by a micromachined storage cavity lifetime
34.3 μs, corresponding to a quality factor of 2 million at single-photon energies. The transmon coherence times are
T1=6.4 μs, and
T2Echo=11.7 μs. We measure qubit-cavity dispersive coupling with rate
χqμ/2π=−1.17 MHz, constituting a Jaynes-Cummings system with an interaction strength
g/2π=49 MHz. With these parameters we are able to demonstrate cQED operations in the strong dispersive regime with ease. Finally, we highlight several improvements and anticipated extensions of the technology to complex MMIQCs.
High fidelity quantum operations are key to enabling fault-tolerant quantum computation. Superconducting quantum processors have demonstrated high-fidelity operations, but on larger devices there is commonly a broad distribution of qualities, with the low-performing tail affecting near-term performance and applications. Here we present an error budgeting procedure for the native two-qubit operation on a 32-qubit superconducting-qubit-based quantum computer, the OQC Toshiko gen-1 system. We estimate the prevalence of different forms of error such as coherent error and control qubit leakage, then apply error suppression strategies based on the most significant sources of error, making use of pulse-shaping and additional compensating gates. These techniques require no additional hardware overhead and little additional calibration, making them suitable for routine adoption. An average reduction of 3.7x in error rate for two qubit operations is shown across a chain of 16 qubits, with the median error rate improving from 4.6
% to 1.2
% as measured by interleaved randomized benchmarking. The largest improvements are seen on previously under-performing qubit pairs, demonstrating the importance of practical error suppression in reducing the low-performing tail of gate qualities and achieving consistently good performance across a device.