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IEEE International Superconductive Electronics Conference (ISEC)

Three Parallel Generation of a 4-Bit M-Sequence Using Single-Flux-Quantum Digital Circuits

Yoshinao Mizugaki, Yasuaki Mutoh, Yoshiaki Urai, Kazunao Sawada, Tomoki Watanabe

Published Jul 1, 2015• 1 citation
Publisher

Abstract

Maximum-length sequences (M-sequences) are known as pseudo random numbers generated with relatively simple digital circuits. In this paper, we present a 4-bit M-sequence generator designed and fabricated using a single-flux-quantum (SFQ) logic library and a niobium integration technology. To enhance its generation rate, we have introduced a parallelization scheme where three bits are simultaneously generated in one clock operation. The circuit comprises three exclusive ORs, one delay flip-flop, two dc/SFQ converters (for SET and CLOCK signals), and three SFQ/dc converters (for three parallel outputs). A 10-GHz clock generator of 13 bits is also implemented for high speed testing. The total number of Nb/AlOx/Nb Josephson junctions is 568. Verilog simulation has demonstrated correct circuit operation at 20-GHz clock, which corresponds to the generation rate of 60 Gb/s. The measurement was carried out in a liquid helium bath with double μ-metal cans. Low speed testing with a 1-kHz clock demonstrated periodic signals of three parallelized 4-bit M-sequence; (0, 1, 0), (1, 1, 1), (1, 0, 0), (0, 1, 0), and (0, 1, 1), where (out1, out2, out3) represents the signals from the output ports. We also confirmed that the output signals were correctly shifted when 10-GHz clocks of 13 bits were fed between two 1-kHz clock signals.

DOI
10.1109/isec.2015.7383487

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Maximum-length sequences (M-sequences) are known as pseudo random numbers generated with relatively simple digital circuits. In this paper, we present a 4-bit M-sequence generator designed and fabricated using a single-flux-quantum (SFQ) logic library and a niobium integration technology. To enhance its generation rate, we have introduced a parallelization scheme where three bits are simultaneously generated in one clock operation. The circuit comprises three exclusive ORs, one delay flip-flop, two dc/SFQ converters (for SET and CLOCK signals), and three SFQ/dc converters (for three parallel outputs). A 10-GHz clock generator of 13 bits is also implemented for high speed testing. The total number of Nb/AlOx/Nb Josephson junctions is 568. Verilog simulation has demonstrated correct circuit operation at 20-GHz clock, which corresponds to the generation rate of 60 Gb/s. The measurement was carried out in a liquid helium bath with double μ-metal cans. Low speed testing with a 1-kHz clock demonstrated periodic signals of three parallelized 4-bit M-sequence; (0, 1, 0), (1, 1, 1), (1, 0, 0), (0, 1, 0), and (0, 1, 1), where (out1, out2, out3) represents the signals from the output ports. We also confirmed that the output signals were correctly shifted when 10-GHz clocks of 13 bits were fed between two 1-kHz clock signals.
Maximum-length sequences (M-sequences) are known as pseudo-random numbers generated with relatively simple digital circuits. In this paper, we present a single-flux-quantum digital circuit that generated three output bits of a 4-bit M-sequence in one clock operation. The circuit comprised three clocked exclusive-or gates, one delay flip-flop, three dc/SFQ converters (for set, reset, and low-frequency clock signals), and three SFQ/dc converters (for three parallel outputs), all of which were integrated on a superconducting Nb chip. A 10-GHz clock generator was also implemented for high-speed testing. The total number of Nb/AlOx/Nb Josephson junctions was 568. Verilog simulation demonstrated correct circuit operation with a 20-GHz clock, which corresponded to the generation rate of 60 Gb/s. The measurement was carried out in a liquid helium bath. Low-speed testing with a 1-kHz clock demonstrated periodic signals of three parallelized 4-bit M-sequence. We also confirmed that the outputs were correctly shifted when 13 clock signals of 10 GHz were fed between two 1-kHz clock signals.
A hardware random number generator using Josephson oscillation and a few single flux quantum (SFQ) logic gates is presented. The logic circuit of the random number generator consists of one toggle flip flop and one and gate. A prototype random number generator is designed by logic cells based on a 2.5-kA/cm2Nb/AlOx/Nb integration process. The fundamental operation at a few hundred megahertz of the random number sampling frequency is confirmed by numerical simulation when a DC/SFQ converter is used for generating trigger signals. An additional delay line using an overdamped Josephson transmission line is used for increasing the timing jitter to get random numbers. The delay line makes it possible for the random number generator to operate over 1 GHz. To confirm the fundamental operation of the circuit, a primitive SFQ random number generator is fabricated using the AIST standard process with 2.5-kA/cm2Nb/AlOx/Nb junctions and the standard logic cell library. A random number generation based on a low-speed functional test is successfully confirmed.
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.
We experimentally evaluated random number sequences generated by a superconducting hardware random number generator composed of a Josephson-junction oscillator, a rapid-single-flux-quantum (RSFQ) toggle flip-flop (TFF), and an RSFQ AND gate. Test circuits were fabricated using a 10 kA/cm2 Nb/AlOx/Nb integration process. Measurements were conducted in a liquid helium bath. The random numbers were generated for a trigger frequency of 500 kHz under the oscillating Josephson-junction at 29 GHz. 26 random number sequences of 20 kb length were evaluated for bias voltages between 2.0 and 2.7 mV. The NIST FIPS PUBS 140-2 tests were used for the evaluation. 100% pass rates were confirmed at the bias voltages of 2.5 and 2.6 mV. We found that the Monobit test limited the pass rates. As numerical simulations suggested, a detailed evaluation for the probability of obtaining “1” demonstrated the monotonical dependence on the bias voltage.
A 4 bit 15 sequence SFQ (Single Flux Quantum) pseudorandom bit sequence generator was built with an eight-level Nb/AlO/sub x//Nb Josephson junction integrated circuit process. An SFQ circuit was built into the code generator to enable a rapid restart. The test results showed that the circuit operated correctly at the seed of 3.69 GHz. The XNOR gate and shift register worked correctly at 5 GHz. However, the back delay was longer than 200 psec and the generator acted as a 5 bit 21 sequence code generator at this frequency. At 200 MHz, the code generator was operated continuously to observe its stability. Over the course of two and one half hours, the circuit made only five code errors, indicating a bit error rate of 3/spl times/10/sup -12/. At 2 GHz we collected 10 million samples on the 4023rd bit of the sequence. No wrong signal values were observed, indicating the bit error rate is less than 5/spl times/10/sup -11/ at this frequency.
A single flux quantum (SFQ) logic cell library has been developed for the 10kA/cm2 Nb multi-layer fabrication process to efficiently design large-scale SFQ digital circuits. In the new cell library, the critical current density of Josephson junctions is increased from 2.5kA/cm2 to 10kA/cm2 compared to our conventional cell library, and the McCumber-Stwart parameter of each Josephson junction is increased to 2 in order to increase the circuit operation speed. More than 300 cells have been designed, including fundamental logic cells and wiring cells for passive interconnects. We have measured all cells and confirmed they stably operate with wide operating margins. On-chip high-speed test of the toggle flip-flop (TFF) cell has been performed by measuring the input and output voltages. The TFF cell at the input frequency of up to 400GHz was confirmed to operate correctly. Also, several fundamental digital circuits, a 4-bit concurrent-flow shift register and a bit-serial adder have been designed using the new cell library, and the correct operations of the circuits have been demonstrated at high clock frequencies of more than 100GHz.