Superconducting complementary output switching logic operating at 5–10 Gb/s
Mark Jeffery, Willem Jakobus Perold, T. Van Duzer
We present experimental results of superconducting voltage-state complementary output switching logic gates operating 10 Gb/s and 2-bit encoder circuits clocked at 5–8 Gb/s. The logic gates and circuits were designed using a Monte Carlo optimization process so that they have a high theoretical yield at 5–10 Gb/s in spite of existing Josephson junction process variations.
Applied Physics Letters•Oct 28, 1996•18 citations