Reversible logic has been recently considered as an interesting and important issue in designing combinational and sequential circuits. The combination of reversible logic and multi-valued logic can improve power dissipation, time and space utilization rate of designed circuits. Only few works have been reported about sequential reversible circuits and almost there are no paper exhibited about quantum ternary reversible counter. In this paper, first we designed 2-qutrit and 3-qutrit quantum reversible ternary up-counters using quantum ternary reversible T-flip-flop and quantum reversible ternary gates. Then we proposed generalized quantum reversible ternary n-qutrit up-counter. We also introduced a new approach for designing any type of n-qutrit ternary and reversible counter. According to the results, we can conclude that applying second approach quantum reversible ternary up-counter is better than the others.
Reversible logic has been recently considered as an interesting and important issue in designing combinational and sequential circuits. The combination of reversible logic and multi-valued logic can improve power dissipation, time and space utilization rate of designed circuits. Only few works have been reported about sequential reversible circuits and almost there are no paper exhibited about quantum ternary reversible counter. In this paper, first we designed 2-qutrit and 3-qutrit quantum reversible ternary up-counters using quantum ternary reversible T-flip-flop and quantum reversible ternary gates. Then we proposed generalized quantum reversible ternary n-qutrit up-counter. We also introduced a new approach for designing any type of n-qutrit ternary and reversible counter. According to the results, we can conclude that applying second approach quantum reversible ternary up-counter is better than the others.
Abstract In recent years, quantum computing has emerged as a leading approach for accelerating complex computations, leveraging quantum parallelism and entanglement to surpass classical limits. Although numerous quantum circuits based on reversible gates have been proposed, optimizing circuit efficiency remains a critical challenge, particularly in the noisy intermediate-scale quantum era, where error rates and coherence times constrain performance. Ternary quantum computing, which operates on three-level quantum systems (qutrits), offers a promising alternative by reducing circuit complexity and resource overhead. In particular, balanced ternary logic presents advantages over conventional ternary logic by enhancing resource efficiency and potentially mitigating quantum gate error rates. This paper focuses on two key objectives: first, the synthesis of a reversible 1-qutrit comparator circuit using balanced ternary logic, and second, the extension to a generalized n-qutrit comparator. The proposed 1-qutrit comparator achieves notable improvements over existing unbalanced designs, demonstrating a 65% reduction in quantum cost, 50% fewer constant inputs, and a 33% decrease in garbage outputs. These results highlight the potential of balanced ternary logic to enhance the efficiency of quantum circuits, making it a valuable contribution to the development of scalable and error-resilient quantum hardware.
Multiplexer and demultiplexer circuits are among the main circuits in designing the complicated hardware. Therefore, enhancing their performance is very important. In the last few years one of the cases that got the attention of the researchers is designing circuits with low power. Using the reversible logic in designing the circuits can reduce power dissipation and power consumption. Using the ternary logic also leads to a better performance, reducing the power consumption and enhancing of fault tolerance in reversible circuits. In this paper, we have presented quantum reversible ternary multiplexer and demultiplexer circuits, we have used reversible ternary shift and controlled Feynman gates. Presented circuits in this paper have a better performance in compared to the previous designs. The improvements are reported.
Abstract In recent years, ternary reversible logic has become a promising paradigm for advancing low-power, high-performance quantum digital systems that preserve information and are energy efficient. This paper focuses on two primary objectives: first, the efficient realization of ternary reversible 3×1 3 × 1 multiplexers and 1×3 1 × 3 demultiplexers using quantum gates, specifically 1-qutrit Shift and 3-qutrit Controlled Feynman gates, and second, the design of generalized n×1 n × 1 multiplexers and 1×n 1 × n demultiplexers. The proposed 9×1 9 × 1 multiplexer we propose in this study has demonstrated notable improvements in terms of quantum cost (20%), depth (18%), number of constant inputs (60%), and garbage outputs (30%), while the proposed 1×9 1 × 9 demultiplexer shows a 20% reduction in quantum cost, a 18% reduction in depth, a 33% reduction in constant inputs, and a 50% reduction in garbage outputs, compared to the most efficient existing designs. These optimizations represent an important step forward in the development of more efficient ternary and quantum reversible logic circuits, advancing the scalability of quantum systems.
Reversible ternary circuit design is now being taken into consideration for its application within the quantum computer and other technologies associated with the nanotechnology domain, in addition to the advantages of the ternary logic application as opposed to binary logic. Multiplier circuit is one of the most important computing circuit in the ALU. Therefore, the circuit optimization for the multiplication will lead to efficient processor. In this paper, the reversible circuit for multiplication of two unsigned two-digit ternary numbers has been proposed. To construct reversible ternary multiplier, a new component termed TPPG with the quantum cost of 13 for partial product generation was proposed. In addition, we have introduced four new blocks of reversible ternary adder with the quantum cost of 11, 10, 7, 5 and one constant input, which can be used in the proposed multiplier circuit. We attempted to optimize the design of the circuits in terms of quantum cost, a number of primitive gates, constant inputs, and garbage outputs as far as possible. To realize all proposed circuits, one-qutrit shift gates and two-qutrit Muthukrishnan-Stroud gates were used.
Abstract Designing conventional circuits present many challenges, including minimizing internal power dissipation. An approach to overcoming this problem is utilizing quantum technology, which has attracted significant attention as an alternative to Nanoscale CMOS technology. The reduction of energy dissipation makes quantum circuits an up-and-coming emerging technology. Ternary logic can potentially diminish the quantum circuit width, which is currently a limitation in quantum technologies. Using qutrit instead of qubit could play an essential role in the future of quantum computing. First, we propose two approaches for quantum ternary decoder circuit in this context. Then, we propose a quantum ternary multiplexer and quantum ternary demultiplexer to exploit the constructed quantum ternary decoder circuit. Techniques to achieve lower quantum cost are of importance. We considered two types of circuits, one in which the output states are always restored to the initial input states and the other in which the states of the output are irrelevant. We compare the proposed quantum ternary circuits with their existing counterparts and present the improvements. It is possible to realize the proposed designs using macro-level ternary gates that are based on the ion-trap realizable ternary 2-qutrit Muthukrishnan–Stroud and 1-qutrit permutation gates.
One of the main motivations for using ternary logic systems is the amount of information per circuit line is higher as compared to the corresponding binary logic representation, thereby leading to more compact circuit realizations. This is particularly attractive for quantum computing as qutrits are expensive resources and minimizing their number is one of the main objectives during synthesis. Therefore, ternary reversible logic synthesis has drawn significant attention among researchers. It deals with fundamental unit of information called qutrits that can exist in one of the three states |0>, |1> and |2>. Hence, the aim of this paper is to bridge the knowledge gap for the beginners in this domain than searching the entire space. Therefore, the present work discusses the basic concepts of ternary reversible logic and ternary reversible gates. The detailed discussion of the various ternary reversible logic synthesis will enable the beginners in this domain to understand the ternary reversible logic in a better way.