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Applied Physics Letters

Ultralow bias power all-optical photonic crystal memory realized with systematically tuned L3 nanocavity

Eiichi Kuramochi, Kengo Nozaki, Akihiko Shinya, Hideaki Taniyama, Koji Takeda, Tomonari Sato, Shinji Matsuo, Masaya Notomi

Published Nov 30, 2015• 14 citations

Abstract

An InP photonic crystal nanocavity with an embedded InGaAsP active region is a unique technology that has realized an all-optical memory with a sub-micro-watt operating power and limitless storage time. In this study, we employed an L3 design with systematic multi-hole tuning, which realized a higher loaded Q factor (>40 000) and a lower mode volume (0.9 μm3) than a line-defect-based buried-heterostructure nanocavity (16 000 and 2.2 μm3). Excluding the active region realized a record loaded Q factor (210 000) in all for InP-based nanocavities. The minimum bias power for bistable memory operation was reduced to 2.3 ± 0.3 nW, which is about 1/10 of the previous record of 30 nW. This work further established the capability of a bistable nanocavity memory for use in future ultralow-power-consumption on-chip integrated photonics.

DOI: 10.1063/1.4936372

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An InP photonic crystal nanocavity with an embedded InGaAsP active region is a unique technology that has realized an all-optical memory with a sub-micro-watt operating power and limitless storage time. In this study, we employed an L3 design with systematic multi-hole tuning, which realized a higher loaded Q factor (>40 000) and a lower mode volume (0.9 μm3) than a line-defect-based buried-heterostructure nanocavity (16 000 and 2.2 μm3). Excluding the active region realized a record loaded Q factor (210 000) in all for InP-based nanocavities. The minimum bias power for bistable memory operation was reduced to 2.3 ± 0.3 nW, which is about 1/10 of the previous record of 30 nW. This work further established the capability of a bistable nanocavity memory for use in future ultralow-power-consumption on-chip integrated photonics.

An all-optical packet switching using bistable photonic crystal nanocavity memories was demonstrated for the first time. Nanocavity-waveguide coupling systems were configured for 1 × 1, 1 × 2, and 1 × 3 switches for 10-Gb/s optical packet, and they were all operated with an optical bias power of only a few μW. The power is several magnitudes lower than that of previously reported all-optical packet switches incorporating all-optical memories. A theoretical investigation indicated the optimum design for reducing the power consumption even further, and for realizing a higher data-rate capability and higher extinction. A small footprint and integrability are also features of our switches, which make them attractive for constructing an all-optical packet switching subsystem with a view to realizing optical routing on a chip.