Summary form only given. Superconducting computing has recently emerged as a potential solution for energy-efficient, large-scale computing. Problems in large-scale computing are reviewed. Superconducting computing is significantly different from conventional technologies and required a feasibility study [1] to evaluate its potential. Concepts were investigated for computing systems capable of performance in the range from 1 to 1000 PFLOP/s. The concept systems were constrained to use existing commercial cryogenic refrigerators and Nb superconducting technology. Superconducting computing was shown to be potentially competitive on the basis of power and energy efficiency if key component technologies can meet specific goals. Challenges for superconducting computing are reviewed. One challenge is that saving significant energy requires large-scale systems due to the requirement for cryogenic refrigeration, but superconducting computing is a technology in its infancy. For example, in 2010 there were a very few foundries for superconducting electronic circuits and only one with very limited access was processing 200 mm wafers. There were also few superconducting digital circuit designers and the electronic design automation (EDA) toolchain could only support development of circuits with a few thousand elements. These challenges are shared with several other alternative technologies being developed for energy-efficient computing. The IARPA Cryogenic Computing Complexity (C3) program is in the process of developing superconducting computing technologies for large-scale applications.
Summary form only given. Superconducting computing has recently emerged as a potential solution for energy-efficient, large-scale computing. Problems in large-scale computing are reviewed. Superconducting computing is significantly different from conventional technologies and required a feasibility study [1] to evaluate its potential. Concepts were investigated for computing systems capable of performance in the range from 1 to 1000 PFLOP/s. The concept systems were constrained to use existing commercial cryogenic refrigerators and Nb superconducting technology. Superconducting computing was shown to be potentially competitive on the basis of power and energy efficiency if key component technologies can meet specific goals. Challenges for superconducting computing are reviewed. One challenge is that saving significant energy requires large-scale systems due to the requirement for cryogenic refrigeration, but superconducting computing is a technology in its infancy. For example, in 2010 there were a very few foundries for superconducting electronic circuits and only one with very limited access was processing 200 mm wafers. There were also few superconducting digital circuit designers and the electronic design automation (EDA) toolchain could only support development of circuits with a few thousand elements. These challenges are shared with several other alternative technologies being developed for energy-efficient computing. The IARPA Cryogenic Computing Complexity (C3) program is in the process of developing superconducting computing technologies for large-scale applications.
Large-scale computing system characteristics vary by application class, but power and energy use has become a major problem for all classes. Superconducting computing may be able to serve the needs of these systems significantly better than conventional technology. Recent developments in single flux quantum circuit technology for digital logic include variants with greatly improved energy efficiency. Concepts were investigated for computing systems capable of performance in the range from 1 to 1000 PFLOP/s. The concept systems were constrained to use existing commercial cryogenic refrigerators and Nb superconducting technology. In order to meet the performance goals, cache and main memory capable of operating at cryogenic temperatures will be required. Superconducting computing is shown to be potentially competitive on the basis of power and energy efficiency if key component technologies can meet specific goals. Potential advantages of superconducting computing are identified as well as areas requiring further development.
The superconducting qubit quantum computer is one of the most promising quantum computing architectures for large-scale integration due to its maturity and close proximity to the well-established semiconductor manufacturing infrastructure. From an education perspective, it also bridges classical microwave electronics and quantum electrodynamics. In this paper, we will review the basics of quantum computers, superconductivity, and Josephson junctions. We then introduce important technologies and concepts related to DiVincenzo's criteria, which are the necessary conditions for the superconducting qubits to work as a useful quantum computer. Firstly, we will discuss various types of superconducting qubits formed with Josephson junctions, from which we will understand the trade-off across multiple design parameters, including their noise immunity. Secondly, we will discuss different schemes to achieve entanglement gate operations, which are a major bottleneck in achieving more efficient fault-tolerant quantum computing. Thirdly, we will review readout engineering, including the implementations of the Purcell filters and quantum-limited amplifiers. Finally, we will discuss the nature and review the studies of two-level system defects, which are currently the limiting factor of qubit coherence time. DiVincenzo's criteria are only the necessary conditions for a technology to be eligible for quantum computing. To have a useful quantum computer, large-scale integration is required. We will review proposals and developments for the large-scale integration of superconducting qubit devices. By comparing with the application of electronic design automation (EDA) in semiconductors, we will also review the use of EDA in superconducting qubit quantum computer design, which is necessary for its large-scale integration.
Superconductive electronics offers a unique combination of high bandwidth and low power for mission critical hardware such as digital processors at 20 to 100 GHz, microwatt per bit analog to digital converters, large digital switches at multi-Gb/s data rates, and low noise parametric amplifiers. This cryogenic technology, typically operating at a few degrees or a few tens of degrees Kelvin, depends upon the unique physics of superconducting materials such as Nb, NbN, and YBaCuO, and the fundamental circuit element, the Josephson junction (JJ) to create unique architectures of unprecedented design efficiency and performance. These circuits are based on the single flux quantum (SFQ) logic family, a technology that has no parallel in semiconductor electronics. Digital data is transmitted by voltage pulses with amplitude less than 1 mV, but at extremely high speeds. Individual gates have been operated as high as 370 GHz. In this paper, we present a brief overview of superconductive digital technology, describe some recent circuits, and discuss how the challenges to superconductive technology are being met, including the use of multi-chip module (MCM) technology, and the potential use of III-V HBT and HEMT circuits to provide interface drivers and amplifiers, possibly operated cryogenically.
Quantum computing holds the potential to solve problems beyond the capabilities of classical computers. However, realizing practical large-scale quantum computers faces critical challenges, including the key bottleneck in wiring quantum processors operating at cryogenic temperatures to their room temperature control electronics. This article explores cryo-CMOS ICs as an enabling technology to circumvent such a wiring bottleneck. After reviewing the basics of quantum computing and the behavior of CMOS devices at cryogenic temperatures, the requirements for the interface electronics for superconducting and semiconductor qubits are discussed, and state-of-the-art cryo-CMOS circuit solutions are briefly described, including a few hints to other qubit platforms. Finally, the article concludes with an overview of future challenges to be addressed to realize the vision of cryo-CMOS technology as an enabler of large-scale quantum computers with practical applications.
Abstract Superconducting quantum computing has emerged as a leading platform in the pursuit of practical quantum computers, driven by rapid advances from industry, academia, and government initiatives. This review examines the state of superconducting quantum technology, with emphasis on qubit design, processor architecture, scalability, and supporting quantum software. We compare the hardware strategies and performance milestones of key players—including IBM Quantum, Google Quantum AI, Rigetti Computing, Intel Quantum, QuTech, and Oxford Quantum Circuits—highlighting innovations in qubit coherence, control, and system integration. Landmark demonstrations such as quantum supremacy experiments are discussed alongside progress toward real-world applications in the noisy intermediate-scale quantum (NISQ) era. Beyond hardware, attention is given to the broader software and service ecosystem, including quantum programming frameworks, operating environments, and cloud-accessible platforms such as Amazon Braket, Azure Quantum, and OriginQ Cloud, which enable remote access and algorithm development. Persistent challenges in superconducting quantum computing—such as error correction, system stability, and large-scale integration—are assessed in light of emerging approaches aimed at fault-tolerant quantum computing. As the field moves from the NISQ era toward fault-tolerant quantum computing, we capture the defining hardware achievements and characteristics of current superconducting processors, while examining the ongoing efforts and challenges in overcoming NISQ-era limitations. These developments offer critical insights into the path toward scalable quantum systems and their transformative impact on future technologies, while also underscoring the strategic and societal considerations that require balancing innovation with responsible oversight and thoughtful governance.
Superconducting digital computing (SDC) based on Josephson junctions (JJs) offers significant potential for enhancing compute throughput and reducing energy consumption compared to conventional room-temperature CMOS-based approaches. Current superconducting logic families exhibit diverse characteristics in clocking strategies, power management, and information encoding techniques. This paper reviews recent advancements in unconventional computing methods specifically designed for superconducting digital circuits, emphasizing temporal computing and pulse-train representations. Notable techniques include race logic (RL), temporal pulse train computing (U-SFQ), and temporal multipliers, each offering unique performance and area advantages suited to superconducting implementations. Additionally, this paper reviews innovations in superconducting coarse-grain reconfigurable architectures (CGRA), superconducting-specific on-chip communication architectures, cryogenic sensor interfaces, and quantum computing control electronics. Finally, we highlight research challenges that should be addressed to facilitate the widespread adoption of superconducting digital computing.