IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Efficient decoder design for high-throughput LDPC decoding

Zhiqiang Cui, Zhongfeng Wang, Xinmiao Zhang, Qingwei Jia

Published Nov 1, 2008• 24 citations

Abstract

In this paper, a matrix permutation scheme is proposed to convert a generic QC-LDPC code to a shift-structured LDPC code. Thus, efficient VLSI architectures can be developed to achieve very high decoding throughput with low hardware complexity. Furthermore, novel implementation schemes for min-sum algorithm based column-layered decoding are presented. The proposed approaches provide very efficient ways for high-speed decoder design of generic QC-LDPC codes.

DOI: 10.1109/apccas.2008.4746351

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