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IEEE Transactions on Applied Superconductivity

Design and Evaluation of Multi-Flux-Quantum Drivers Using Under-Damped Josephson Junctions

Dan Ozawa, Yuki Yamanashi, Nobuyuki Yoshikawa

Published Jan 7, 2011• 2 citations
Publisher

Abstract

The lack of driving ability is one weakness of single-flux-quantum (SFQ) devices. At present, pulse splitters, which generate double or triple flux quanta from an SFQ input, are used when multiple-flux quanta (MFQ) must be obtained from an SFQ input. However, the splitter-based MFQ driver requires a very large circuit area and high latency. In order to overcome these problems, we investigated an MFQ driver using under-damped Josephson junctions. The advantage of the proposed MFQ driver is its current driving ability. The proposed MFQ driver can be used as a bit-line driver in an SFQ memory or as an output driver in a current-recycling system, which requires a large gain. The proposed MFQ driver was implemented using the ISTEC 2.5 kA/cm2Nb standard process (STP2), and its driving ability was investigated. We obtained a histogram of the output pulse number of the MFQ driver as a function of the bias current. In addition, we examined the propagation delay of the MFQ driver through circuit simulations. The results indicate that the MFQ driver can generate MFQ from an SFQ input more rapidly than splitter-based MFQ drivers.

DOI
10.1109/tasc.2010.2096453

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The lack of driving ability is one weakness of single-flux-quantum (SFQ) devices. At present, pulse splitters, which generate double or triple flux quanta from an SFQ input, are used when multiple-flux quanta (MFQ) must be obtained from an SFQ input. However, the splitter-based MFQ driver requires a very large circuit area and high latency. In order to overcome these problems, we investigated an MFQ driver using under-damped Josephson junctions. The advantage of the proposed MFQ driver is its current driving ability. The proposed MFQ driver can be used as a bit-line driver in an SFQ memory or as an output driver in a current-recycling system, which requires a large gain. The proposed MFQ driver was implemented using the ISTEC 2.5 kA/cm2Nb standard process (STP2), and its driving ability was investigated. We obtained a histogram of the output pulse number of the MFQ driver as a function of the bias current. In addition, we examined the propagation delay of the MFQ driver through circuit simulations. The results indicate that the MFQ driver can generate MFQ from an SFQ input more rapidly than splitter-based MFQ drivers.
The increasing complexity of modern rapid single flux quantum (RSFQ) circuits has made the issue of multiple fanout of growing importance. Most RSFQ gates can only drive a single output. Splitter gates can however distribute an SFQ pulse to multiple fanout. To drive N SFQ gates, N-1 splitters with a fanout of two are required. Large splitter trees are often used in high speed VLSI complexity SFQ systems. These splitters require significant area and increase the path delay. In this paper, three area and power efficient splitter topologies for large scale RSFQ circuits are introduced. These SFQ splitters are an active splitter tree with fewer JJs, a passive splitter, and a multi-output active splitter. A methodology is presented for determining when to use passive or active splitters. Tradeoffs among the number of JJs, bias current of each stage, and delay are reported along with a margin analysis. The proposed splitters greatly reduce the required bias currents and delay of large scale RSFQ circuits by enabling multiple fanout. The methodologies and techniques are applicable to automated layout and clock tree synthesis for large scale SFQ integrated circuits.
The high-speed operation of a one-channel output interface for a single-flux quantum (SFQ) system has been demonstrated. The interface consisted of a Josephson latching driver, a room-temperature semiconductor amplifier, and a decision circuit module. The Josephson latching driver was fabricated by using a 2.5-kA/cm/sup 2/ standard Nb junction process and used to amplify an SFQ pulse into a 5.5-mV level signal at 10 Gb/s. The interface converted the SFQ pulse signal into a nonreturn-to-zero signal having an amplitude of 1 V at 10 Gb/s.
A Double-Flux-Quantum (DFQ) amplifier can multiply its input voltage with quantum accuracy using DFQ generation at under-damped Josephson junctions. We conducted research on digital-to-analogue converters that were implemented using DFQ amplifiers for metrological applications. Conventional DFQ amplifiers were usually operated using two flux-biasing lines. In this study, we redesigned the circuit layout to realize operation using a single flux-biasing line. We designed a new layout of a 20-fold DFQ amplifier and fabricated it using a 2.5-kA/cm 2 Nb/AlO x /Nb process. The measurement was performed in liquid He. The Single-Flux-Quantum (SFQ) pulse train was fed using an over-biasing method, and the input-output characteristics are acquired using an oscilloscope. When the magnetic flux bias current I fb1 was not supplied, the maximum input voltage V inmax was 68 μV, which was 4.2 times larger than the value of 17 μV that was observed in our previous study. V inmax was enhanced to 120 μV when we supplied an I fb1 of 1.00 mA.
An increase in bias currents supplied to single-flux-quantum (SFQ) circuits is a rising problem in building large-scale integrated SFQ circuits, because the magnetic fields generated by bias currents and ground return currents affect the circuit operation. Current recycling technique, which can drastically reduce the total bias current of SFQ circuits, is expected to be a very effective solution for large-scale SFQ circuits. To realize the current recycling technique, signal transmission between SFQ logic circuits located on different ground planes is required. Two types of inductively coupled pulse transfer circuits were examined in this study. One is composed of a simple JTL driver and a DC-SQUID receiver whose junctions are slightly under-damped to enhance the magnetic sensitivity of the SQUID. The other circuit is composed of an SFQ driver based on a delay flip-flop (DFF) and a SQUID receiver. The advantage of the DFF-based circuit is that the coupling time between the driver and the receiver can be increased to ensure appropriate switching in the receiver junction. Two types of transfer circuits were implemented using the SRL 2.5 kA/cm2Nb process and their correct operation was experimentally confirmed. Circuit structures for effective coupling of the SFQ pulse transfer were also investigated. It was shown that a ground plane boundary should be separated from a ground plane hole underneath coupling inductors to obtain high coupling factors.
Abstract Controlling a large number of superconducting qubits is a key challenge for realizing a fault-tolerant quantum computer. Implementing a qubit control system operating at the proximal millikelvin stage of the dilution refrigerator is a promising approach to reduce the number of coaxial cables required for qubit control. Single-flux-quantum (SFQ) logic circuits are one candidate for realizing such cryogenic control systems; however, their power dissipation must be minimized to avoid any negative impact on qubit performance. In this study, we demonstrate the operation of a flux-bias-free (FBF) flux qubit controlled by an SFQ driver on a monolithic chip. Here, the critical current ( I C ) of the Josephson junctions in the SFQ driver was set to a few µA, which is two orders of magnitude smaller than that in a typical SFQ circuit operating at 4 K, significantly reducing power consumption. Using this low-power SFQ driver, we successfully demonstrate single-qubit operation without any reduction of the energy relaxation time of the FBF qubit.