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IEEE Transactions on Applied Superconductivity

A Multi-Qubit SFQ Control Architecture Using Recycled Bias Current

Bicong Weng, Xue Zhang, Xiaoping Gao, Shucheng Yang, Minghui Niu, Jie Ren

Published Jan 16, 2026• 0 citations
Publisher

Abstract

High-frequency input signals from room-temperature microwave sources present a major bottleneck for scaling qubit numbers in universal quantum computers. To address this challenge, we previously developed a superconducting single-flux quantum (SFQ) qubit control circuit (SQCC) capable of generating precise SFQ pulse sequences using only DC bias. This approach eliminates traditional microwave signal chains and enables scalable, low-loss DC-based interconnects. However, as the number of SQCCs increases, the total required bias current grows linearly, leading to significant cable-induced thermal dissipation that limits scalability. In this work, we propose and implement an architecture using recycled bias current to scale up multiple SQCCs (RB-MSQCC). Theoretical analysis indicates that the recycling method can reduce thermal load by a factor of 100 to 1000 compared to conventional biasing. A key enabler of this architecture is a custom-designed driver-receiver pair (DRP) cell, which supports SFQ signal transmission across isolated ground planes using the SIMIT Nb03 process. Based on this, we demonstrate a 4-bit RB-MSQCC prototype. Experimental results confirm stable SFQ pulse generation across all four channels, with output frequencies ranging from 3.42 to 5.27 GHz, consistent with prior results (2.40-8.11 GHz). These findings validate the feasibility and robustness of the proposed scheme under current fabrication constraints. Our study offers both theoretical and experimental support for scalable, energy-efficient SFQ-based qubit control, representing a critical step toward large-scale superconducting quantum processors.

DOI
10.1109/tasc.2026.3653712

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High-frequency input signals from room-temperature microwave sources present a major bottleneck for scaling qubit numbers in universal quantum computers. To address this challenge, we previously developed a superconducting single-flux quantum (SFQ) qubit control circuit (SQCC) capable of generating precise SFQ pulse sequences using only DC bias. This approach eliminates traditional microwave signal chains and enables scalable, low-loss DC-based interconnects. However, as the number of SQCCs increases, the total required bias current grows linearly, leading to significant cable-induced thermal dissipation that limits scalability. In this work, we propose and implement an architecture using recycled bias current to scale up multiple SQCCs (RB-MSQCC). Theoretical analysis indicates that the recycling method can reduce thermal load by a factor of 100 to 1000 compared to conventional biasing. A key enabler of this architecture is a custom-designed driver-receiver pair (DRP) cell, which supports SFQ signal transmission across isolated ground planes using the SIMIT Nb03 process. Based on this, we demonstrate a 4-bit RB-MSQCC prototype. Experimental results confirm stable SFQ pulse generation across all four channels, with output frequencies ranging from 3.42 to 5.27 GHz, consistent with prior results (2.40-8.11 GHz). These findings validate the feasibility and robustness of the proposed scheme under current fabrication constraints. Our study offers both theoretical and experimental support for scalable, energy-efficient SFQ-based qubit control, representing a critical step toward large-scale superconducting quantum processors.
Abstract The use of high-frequency input signals from room-temperature microwave sources makes it difficult to scale up the number of quantum bits in universal quantum computers. To address this issue, superconducting single flux quantum (SFQ) integrated circuits are being explored as suitable candidates for qubit manipulation in universal quantum computers. This paper deals with a scalable SFQ qubit control circuit (SQCC) structure that requires only low-frequency input. The circuit mainly consists of a pulse generator and a counter, that output the SFQ pulse train with adjustable frequency and a controllable number of pulses, which is applicable to control single-qubit Clifford operations. The design of low-voltage rapid single flux quantum (LV-RSFQ) and energy-efficient rapid single flux quantum (ERSFQ) for the SQCC achieves low power consumption and provides a basis for scaling up SQCC to control more qubits. The proposed circuits are fabricated under the SIMIT-Nb03 process and successfully pass test verification. The achieved test results reveal that the adjustable output frequency ranges of the SQCC based on the LV-RSFQ and ERSFQ designs in order are [2.40, 8.11] GHz and [4.81, 5.14] GHz. In the operating frequency range, the circuit is able to generate the correct number of SFQ pulses under control. The controllable number range is from 1 to 128. When the circuits operate at 5 GHz, the total power consumptions of the above circuits in order are 23.88 μW and 6.2 μW. All input signals are low-frequency signals, which frees the control of large-scale qubits from limitations caused by high-frequency inputs produced by room-temperature microwave sources.
The use of high-frequency input signals from room-temperature microwave sources makes it difficult to scale up the number of quantum bits in universal quantum computers. To address this issue, superconducting single flux quantum (SFQ) integrated circuits are being explored as suitable candidates for qubit manipulation in universal quantum computers. Previously, we designed a low-power SFQ qubit control circuit (SQCC) to produce an equidistant SFQ pulse train without high-frequency input. It was reported that the fidelity of qubit control could be further improved if the pattern of SFQ pulse train could be adjustable. In this paper, we present optimized designs for different pattern requirements of qubit control, building upon the SQCC without high-frequency input. These designs feature segmented frequency modulation circuits, as well as circuits capable of outputting arbitrary patterns. The circuit capable of generating arbitrary patterns currently achieves a maximum adjustable number of 400, with a corresponding frequency output of 20 GHz. It has been successfully fabricated using the SIMIT Nb03 process and has passed functionality measurement tests. The optimized circuit opens up possibilities for improved qubit control and advancements in quantum computing applications.
As single flux quantum (SFQ) circuit complexities scale, larger bias currents are required. The large current produces excessive heat and greatly complicates the design process. Current recycling offers a solution by reducing the required bias current through serially biased circuit blocks. Serial biasing is typically achieved in homogeneous SFQ systems where similar bias currents are required in similar circuits. Each of these homogeneous circuits is often placed on different ground planes and serially biased to reuse the bias currents. To address heterogeneous circuits with varying bias current requirements, a novel serial biasing technique is proposed. An interface between the ground planes with unequal bias current is presented that exhibits a current balancing capability. The interface supplies additional current before passing the current to the next ground plane. The ground planes are arranged in ascending order of bias current to manage the complexity of these heterogeneous circuits. Using a one bit SFQ full adder as an example, the proposed approach demonstrates several key benefits: a 49% reduction in the number of driver-receiver pairs, a 6.5% reduction in power dissipation, and a 35% reduction in bias current across a heterogeneous SFQ circuit placed on three isolated ground planes. The performance, bias current margins, and methods for current reduction are also discussed, showcasing the effectiveness of current recycling in improving the efficiency of complex heterogeneous SFQ systems.
An increase in bias currents supplied to single-flux-quantum (SFQ) circuits is a rising problem in building large-scale integrated SFQ circuits, because the magnetic fields generated by bias currents and ground return currents affect the circuit operation. Current recycling technique, which can drastically reduce the total bias current of SFQ circuits, is expected to be a very effective solution for large-scale SFQ circuits. To realize the current recycling technique, signal transmission between SFQ logic circuits located on different ground planes is required. Two types of inductively coupled pulse transfer circuits were examined in this study. One is composed of a simple JTL driver and a DC-SQUID receiver whose junctions are slightly under-damped to enhance the magnetic sensitivity of the SQUID. The other circuit is composed of an SFQ driver based on a delay flip-flop (DFF) and a SQUID receiver. The advantage of the DFF-based circuit is that the coupling time between the driver and the receiver can be increased to ensure appropriate switching in the receiver junction. Two types of transfer circuits were implemented using the SRL 2.5 kA/cm2Nb process and their correct operation was experimentally confirmed. Circuit structures for effective coupling of the SFQ pulse transfer were also investigated. It was shown that a ground plane boundary should be separated from a ground plane hole underneath coupling inductors to obtain high coupling factors.
The practical implementation of RSFQ technology in most digital electronics application areas requires much more complexity than the presently developed circuits. There are two important issues in building large-scale RSFQ circuits: 1) the recycling of the bias currents and 2) the transfer of SFQ pulses between circuits located far apart. RSFQ circuits are well known to operate with DC current bias. Even though the DC current biasing is more forgiving than the problematic AC biasing, it can still be a big concern when the circuit size becomes large. Dramatic reduction of the total bias current can be achieved by biasing several RSFQ circuits in series, where each circuit is positioned on a separate ground plane. In this work, we have used magnetically coupled Josephson transmission lines as inputs and outputs of an isolated shift register to show the feasibility of using the concept of serial biasing in current recycling. The circuit was simulated, fabricated with Nb technology, and tested at a temperature of 4.2 K. Test results show that SFQ pulses were transferred into the shift register built on a separate ground plane, clocked through it, and sent out back to the circuit on the original ground plane. We also studied on how to transfer SFQ pulses over an extended length, an important issue in building large RSFQ circuits. We have designed the circuits to test our microstrip line and multichip module approaches. We designed, optimized, fabricated and tested the circuits. Test results show that SFQ pulses can be successfully transmitted over an extensive distance in a chip and between chips.
Quantum processors have the potential to accelerate specific computing tasks but are difficult to scale up due to engineering limitations, such as the number of available cables and cooling power for dilution refrigerators for quantum bits (qubits). Hence, it is very important to develop scalable, energy-efficient interface circuits that can control many qubits via a few control lines inside a dilution refrigerator. One of the most important interface circuits is the flux controller (FC), which generates arbitrary dc flux bias to adjust the characteristics of component devices such as qubits. In this paper, we propose and demonstrate FCs using an energy-efficient superconductor logic family, adiabatic quantum-flux-parametron (AQFP) logic. We develop two types of FCs: the AQFP FC and the AQFP/single-flux-quantum (AQFP/SFQ) FC. Both FCs require only a few control lines and have extremely small power dissipation, thus exhibiting high scalability. Furthermore, the AQFP/SFQ FC can control flux bias using ballistic SFQ transmission, which is crucial for integration with qubits. As a proof of concept, we demonstrate AQFP and AQFP/SFQ FCs at 4.2 K, fabricated by the AIST high-speed standard process. Our results indicate that AQFP logic is highly suitable for use as qubit interface circuits for very large-scale quantum processors, especially from the viewpoint of the control line count, power dissipation, and amount of supply currents.