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IEEE International Symposium on Multiple-Valued Logic (ISMVL)

Quantum Realization of Some Ternary Circuits Using Muthukrishnan-Stroud Gates

Asif I. Khan, Nadia Nusrat, Samira M. Khan, Masud Hasan, Mozammel H. A. Khan

Published May 1, 2007• 21 citations
Publisher

Abstract

We present realization of ternary Toffoli gate and modified Fredkin gate for quantum computing on top of ion trap realizable Muthukrishnan-Stroud primitive gates. Our design methodology is based on first realizing the quantum circuits using generalized ternary gates and Feynman gates and then replacing them with their equivalent realization using Muthukrishnan-Stroud gates. Our realization of ternary Toffoli gate is more efficient than the previously published result and modified Fredkin gate is realized for the first time in literature using Muthukrishnan-Stroud gates.

DOI
10.1109/ismvl.2007.45

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We present realization of ternary Toffoli gate and modified Fredkin gate for quantum computing on top of ion trap realizable Muthukrishnan-Stroud primitive gates. Our design methodology is based on first realizing the quantum circuits using generalized ternary gates and Feynman gates and then replacing them with their equivalent realization using Muthukrishnan-Stroud gates. Our realization of ternary Toffoli gate is more efficient than the previously published result and modified Fredkin gate is realized for the first time in literature using Muthukrishnan-Stroud gates.
The designs using ternary logic exploit its logarithmic reduction in the number of qudits compared with the binary circuits. In this paper, we propose quantum ternary multiplication gate. We term it as QTMG. Then we present the symbol and the realization of QTMG. Researchers will be able to use this gate as well as its symbol and realizations in their future studies. We also present a new realization of ternary Toffoli gate in specific state. Moreover, in this paper, we propose 1-qutrit multiplier circuit. The symbol and the realization of the proposed 1-qutrit multiplier circuit are also provided. Afterward, we proposed ternary partial products generation circuit (TPPG) and summation network circuit in order to design quantum ternary 2-qutrit multiplier circuit. Overall, the proposed design of QTMG in this paper is suggested for the first time. In addition, the proposed realization of ternary Toffoli gate, TPPG, summation network and 2-qutrit multiplier circuits are compared with the existing designs and the improvements are reported. The proposed gate and circuits are realized using macro-level ternary gates which are built on the top of the ion-trap realizable 1-qutrit gates and 2-qutrit Muthukrishnan–Stroud gates.
Reversible quantum computer system is one of the best choices for future computer systems. Multiple-valued logic especially ternary logic is a good candidate for the realization of reversible quantum computer. An efficient logic synthesis mechanism is essential for the low-cost realization. Toffoli gate is an important gate for quantum logic synthesis. It is the basic element for the Galois Field Sum of Product (GFSOP) expression based logic synthesis mechanism. So, for low-cost realization of any ternary logic function, a low-cost implementation of Toffoli gate is very necessary. This paper shows a low-cost, practically realizable, and efficient realization of 3-qutrit ternary Toffoli gate by using ion-trap realizable Muthukrishnan-Stroud gate. This realization is more efficient and less costly than other realizations.
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