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IEEE Transactions on Applied Superconductivity

Circuits for chip-to-chip transportation of bits from single flux quantum circuits

A. H. Miklich, A. Hodge Worsham, Donald L. Miller, J.X. Przbysz

Published Jun 1, 1997• 5 citations
Publisher

Abstract

We have designed circuits to transmit and receive bits generated by Single-Flux-Quantum (SFQ) circuits. Our circuits were fabricated using shunted Nb-AlOx-Nb junctions. The transmitter is a series array of dc SQUIDs driven into the voltage state in response to an input SFQ pulse. The receiver circuit is inductively coupled to the transmitter. Current from the transmitter biases a junction race in the receiver such that a clock pulse either passes (a '1' bit) or does not (a '0' bit). We have measured a maximum peak-to-peak amplitude from the transmitter of 296 /spl mu/V at a clock rate of 2.5 GHz, and 187 /spl mu/V at 5 GHz.

DOI
10.1109/77.621693

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Superconductor Science and Technology•Nov 1, 1991•5 citations
We have designed circuits to transmit and receive bits generated by Single-Flux-Quantum (SFQ) circuits. Our circuits were fabricated using shunted Nb-AlOx-Nb junctions. The transmitter is a series array of dc SQUIDs driven into the voltage state in response to an input SFQ pulse. The receiver circuit is inductively coupled to the transmitter. Current from the transmitter biases a junction race in the receiver such that a clock pulse either passes (a '1' bit) or does not (a '0' bit). We have measured a maximum peak-to-peak amplitude from the transmitter of 296 /spl mu/V at a clock rate of 2.5 GHz, and 187 /spl mu/V at 5 GHz.
We report experimental results on chip-to-chip transfer of single-flux-quantum (SFQ) pulses using an active multichip module (MCM). Josephson transmitters and receivers are integrated on both a chip and an MCM substrate. An MCM consisting of a 4.8-mm chip and an 8.2-mm MCM substrate was fabricated using a 1.6-kA/cm/sup 2/ Nb-trilayer process and a solder-bumped flip-chip bonding technology. The correct operation of the circuit was confirmed by low-speed testing. Bit-error rate (BER) of the circuit was measured down to 10/sup -5/, and extrapolation of the error-function fits suggested a very small BER, lower than 10/sup -200/, at the optimum bias point. Experimental margins on the bias voltage were as large as /spl plusmn/34%.
A novel approach to chip-to-chip communication for RSFQ technology is proposed. The main idea is to fabricate Josephson junctions on a substrate for multi-chip packaging, which equips the substrate as well as the chip with built-in active drivers and receivers. The driver on the chip is connected directly to the receiver on the substrate through a connector which can be considered as a lumped circuit element. Because the circuit is free from the impedance matching constraint, broadband chip-to-chip data transfer with wide operating margins will be realized. We have designed, simulated and optimized a chip-to-chip single flux quantum (SFQ) pulse transfer circuit. For a connector inductance of 20 pH, the bias current margins and the maximum throughput have been calculated to be /spl plusmn/24% and above 50 Gb/s, respectively.
Chip-to-chip propagation of a single flux quantum (SFQ) pulse has been demonstrated using an active multichip module (MCM) technique in which active transmitters and receivers are integrated on an MCM substrate as well as on a chip. A chip-to-chip SFQ transfer circuit has been designed and implemented by a standard Nb-trilayer process and solder-bumped flip-chip technology. The correct operation of the circuit has been confirmed by low-frequency testing. Experimental margins for the global factor for bias currents have been as large as /spl plusmn/33%.
Maximum-length sequences (M-sequences) are known as pseudo-random numbers generated with relatively simple digital circuits. In this paper, we present a single-flux-quantum digital circuit that generated three output bits of a 4-bit M-sequence in one clock operation. The circuit comprised three clocked exclusive-or gates, one delay flip-flop, three dc/SFQ converters (for set, reset, and low-frequency clock signals), and three SFQ/dc converters (for three parallel outputs), all of which were integrated on a superconducting Nb chip. A 10-GHz clock generator was also implemented for high-speed testing. The total number of Nb/AlOx/Nb Josephson junctions was 568. Verilog simulation demonstrated correct circuit operation with a 20-GHz clock, which corresponded to the generation rate of 60 Gb/s. The measurement was carried out in a liquid helium bath. Low-speed testing with a 1-kHz clock demonstrated periodic signals of three parallelized 4-bit M-sequence. We also confirmed that the outputs were correctly shifted when 13 clock signals of 10 GHz were fed between two 1-kHz clock signals.
Interface circuits for the transfer of data between Single Flux Quantum (SPQ) circuits have been designed, fabricated, and operated at speeds up to 3 Gigabits per second. The circuit employed an improved version of the SFQ/Latch converter, a Modified Variable Threshold Logic (MVTL) OR/AND gate, a 3/spl times/ latching amplifier, and a 3/spl times/-to-10/spl times/ latching amplifier. The amplifier circuits employed stacks of latching junctions. Resistors between the parallel stacks of junctions damped residual currents to prevent flux trapping during reset. Tolerance to critical current variations in the series stacks of junctions was provided by inductive chokes on the input junction shunting resistors. Microwave modeling programs were used to ensure proper distribution of the applied current to all of the latching elements. The circuit transferred data at 3 Gigabits per second from one SFQ circuit up to room temperature and back to another SFQ circuit through 3.4 meters of 50-ohm cable.
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.