A new software package 3D-MLSI was developed for inductance calculation in multilayer superconducting integrated circuits. The key advantages of 3D-MLSI are: a new mathematical model that takes into account the 3D distribution of magnetic field, and a user interface compatible with the Cadence and ACAD design tools. The program is most applicable when both kinetic and magnetic inductances are important. A method of equivalent circuits inductance extraction is suggested.
A new software package 3D-MLSI was developed for inductance calculation in multilayer superconducting integrated circuits. The key advantages of 3D-MLSI are: a new mathematical model that takes into account the 3D distribution of magnetic field, and a user interface compatible with the Cadence and ACAD design tools. The program is most applicable when both kinetic and magnetic inductances are important. A method of equivalent circuits inductance extraction is suggested.
3D-MLSI is a software tool made for inductance extraction of superconducting multilayer structures. Despite long history, its capabilities had not been explored sufficiently deep for Josephson circuits based on niobium technology. Here, we present a thorough study and verification of this program in relation to adiabatic neurons, which are extremely sensitive to variations of inductive parameters. Good agreement of experimental and extracted inductances confirms the high potential of the 3D-MLSI software package for the design of superconducting electronics components.
At present, superconducting integrated circuit layouts are verified through a variety of techniques. A layout-versus-schematic method implemented in Cadence allows extraction of circuit schematics with certain geometry-dependent parameters. Lmeter calculates inductance in a layout network and, with proper setup, may also calculate resistance separately. Recently, InductEx was introduced to calculate multiterminal network inductance in a superconductor structure with support for more complicated 3-D geometries. Here, we present an improvement to InductEx that allows resistance, inductance, and Josephson junction critical current extraction of a full superconducting digital logic gate or cell in a single execution, as well as in reasonable time. We show how InductEx was designed to operate on tape-out ready layouts and, through example, how it is used for full-gate layout verification of contemporary logic cells.
In the design of superconducting quantum chips, the control and readout of the quantum bit (qubit) are realized through interactions with other components in the circuit, such as drive lines, flux lines and readout resonator. Depending on the design, these interactions employ either an inductive or capacitive coupling scheme. Note that every interaction governs critical performance metrics for the chip, including gate fidelity, readout speed, and coherence times, a more effective and precise approach to extract the strength of the coupling is necessary. For most qubit designs, the structure of the qubit typically remains in the electrically small regime. Therefore, simulation software based on static fields and the Method of Moments (MoM), such as Q3D, is still applicable in most instances. However, as the number of qubits on a chip increases, Q3D faces challenges in effectively addressing the complex coupling and crosstalk issues present on the chip. In this work, we extend the lumped-element-based qubit model by using microwave network parameters and thus enable the simulation of the qubit for the Finite Element Method (FEM)-based 3D electromagnetic simulation software, such as HFSS. This approach is suitable for the determination of the capacitive coupling strength between the qubit and the drive line, as well as readout circuits. Furthermore, to address the inductive coupling between the qubit and the flux line, we propose a method in this work that directly computes the mutual inductance, which is implemented by determining the magnetic flux through the DC SQUID area, generated by the current port excitation in HFSS. The proposed methodologies not only effectively extracts the key qubit design parameters, but also offer broader applicability for analysing complex crosstalk in multi-qubit chip designs.
Mutual inductance between two superconducting strip lines coupled through a grounded shield layer is evaluated by both experiments and numerical calculation. A conventional superconducting quantum interference device (SQUID) method on a Nb Josephson IC chip is employed for experiments, whereas a three-dimensional inductance extraction program "FastHenry" is used in numerical calculation. Five test circuits are designed to investigate the effects of two ground contacts placed parallel to the strip lines with different spacing. Both the experimental and numerical results confirm that the mutual inductance is at its minimum when the contacts are placed close to the Josephson junctions, that is, the edges of the SQUID line under evaluation. In the experiments, the minimum value of the mutual inductance is 26% of the value for the reference circuit with a floating shield layer. A model including the Meissner effect in a superconducting loop is found to provide a quasi-quantitative explanation for the dependence on the spacing between two contacts.
In this work, we present a numerical model specifically designed for 3D multilayer devices, with a focus on nanobridge junctions and coplanar waveguides. Unlike existing numerical models, ours does not approximate the physical layout or limit the number of constituent materials, providing a more accurate and flexible design tool. We calculate critical currents, current phase relationships, and the energy gap where relevant. We validate our model by comparing it with published data. Through our analysis, we found that using multilayer films significantly enhances control over these quantities. For nanobridge junctions in particular, multilayer structures improve qubit anharmonicity compared to monolayer junctions, offering a substantial advantage for qubit performance. For coated multilayer microwave circuits it allows for better studies of the proximity effect, including their effective kinetic inductance.
In this work, we present a numerical model specifically designed for 3D multilayer devices, with a focus on nanobridge junctions and coplanar waveguides. Unlike existing numerical models, ours does not approximate the physical layout or limit the number of constituent materials, providing a more accurate and flexible design tool. We calculate critical currents, current–phase relationships, and the energy gap where relevant. We validate our model by comparing it with published data. Through our analysis, we found that using multilayer films significantly enhances control over these quantities. For nanobridge junctions in particular, multilayer structures improve qubit anharmonicity compared to monolayer junctions, offering a substantial advantage for qubit performance. For coated multilayer microwave circuits, it allows for better studies of the proximity effect, including their effective kinetic inductance.