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Wireless Telecommunications Symposium

Design Considerations and Performance Analysis of Good ¿-Rotation LDPC Codes

Rich Echard, Shih-Chun Chang

Published Apr 1, 2006• 4 citations
Publisher

Abstract

In this paper we present two theoretical results that lead to the development of good π-rotation LDPC codes. The first theorem derives bounds on the weight of the parity vector when the weight of the information vector is two. The second theorem establishes the expected number of short-loops in the parity check matrix. We then present construction tools that are used to reduce the complexity of searching minimum distance and girth for π-rotation LDPC codes. Several performance examples are given

DOI
10.1109/wts.2006.334543

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Design considerations leading to the development of good π-rotation LDPC codes

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In this letter we present two theoretical results that lead to the development of good /spl pi/-rotation LDPC codes. The first theorem derives bounds on the weight of the parity vector when the weight of the information vector is two. The second theorem establishes the expected number of short-loops in the parity check matrix. Several performance examples are given.

IEEE Communications Letters•May 1, 2005•13 citations

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Introduction The construction of binary low-density parity-check (LDPC) codes simply involves replacing a small number of the values in an all-zeros matrix by 1s in such a way that the rows and columns have the required degree distribution. In many cases, randomly allocating the entries in H will produce a reasonable LDPC code. However, the construction of H can affect the performance of the sum–product decoder, significantly so for some codes, and also the implementation complexity of the code. While there is no one recipe for a “good” LDPC code, there are a number of principles that inform the code designer. The first obvious decisions are which degree distribution to choose and how to construct the matrix with the chosen degrees, i.e. pseudo-randomly or with some sort of structure. Whichever construction is chosen, the features to consider include the girth of the Tanner graph and the minimum distance of the code. In this chapter we will discuss those properties of an LDPC code that affect its iterative decoding performance and then present the common construction methods used to produce codes with the preferred properties. Following common practice in the field we will call the selection of the degree distributions for an LDPC code code design and the methods to assign the locations in the parity-check matrix for the 1 entries code construction .

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IEE Proceedings - Communications•Jan 1, 2005•10 citations
In this paper we present two theoretical results that lead to the development of good π-rotation LDPC codes. The first theorem derives bounds on the weight of the parity vector when the weight of the information vector is two. The second theorem establishes the expected number of short-loops in the parity check matrix. We then present construction tools that are used to reduce the complexity of searching minimum distance and girth for π-rotation LDPC codes. Several performance examples are given
Low-density parity-check (LDPC) codes have been shown to have good error correcting performance approaching Shannon’s limit. Good error correcting performance enables efficient and reliable communication. However, a LDPC code decoding algorithm needs to be executed efficiently to meet cost, time, power and bandwidth requirements of target applications. The constructed codes should also meet error rate performance requirements of those applications. Since their rediscovery, there has been much research work on LDPC code construction and implementation. LDPC codes can be designed over a wide space with parameters such as girth, rate and length. There is no unique method of constructing LDPC codes. Existing construction methods are limited in some way in producing good error correcting performing and easily implementable codes for a given rate and length. There is a need to develop methods of constructing codes over a wide range of rates and lengths with good performance and ease of hardware implementability. LDPC code hardware design and implementation depend on the structure of target LDPC code and is also as varied as LDPC matrix designs and constructions. There are several factors to be considered including decoding algorithm computations,processing nodes interconnection network, number of processing nodes, amount of memory, number of quantization bits and decoding delay. All of these issues can be handled in several different ways. \nThis thesis is about construction of LDPC codes and their hardware implementation. LDPC code construction and implementation issues mentioned above are too many to be addressed in one thesis. The main contribution of this thesis is the development of LDPC code construction methods for some classes of structured LDPC codes and techniques for reducing decoding time. We introduce two main methods for constructing structured codes. In the first method, column-weight two LDPC codes are derived from distance graphs. A wide range of girths, rates and lengths are obtained compared to existing methods. The performance and implementation complexity of obtained codes depends on the structure of their corresponding distance graphs. In the second method, a search algorithm based on bit-filing and progressive-edge growth algorithms is introduced for constructing quasi-cyclic LDPC codes. The algorithm can be used to form a distance or Tanner graph of a code. This method could also obtain codes over a wide range of parameters. Cycles of length four are avoided by observing the row-column constraint. \nRow-column connections observing this condition are searched sequentially or randomly. Although the girth conditions are not sufficient beyond six, larger girths codes were easily obtained especially at low rates. The advantage of this algorithm compared to other methods is its flexibility. It could be used to construct codes for a given rate and length with girths of at least six for any sub-matrix configuration or rearrangement. The code size is also easily varied by increasing or decreasing sub-matrix size. Codes obtained using a sequential search criteria show poor performance at low girths (6 and 8) while random searches result in good performing codes. \nQuasi-cyclic codes could be implemented in a variety of decoder architectures. One of the many options is the choice of processing nodes interconnect. We show how quasi-cyclic codes processing could be scheduled through a multistage network. Although these net-works have more delay than other modes of communication, they offer more flexibility at a reasonable cost. Banyan and Benes networks are suggested as the most suitable networks. \nDecoding delay is also one of several issues considered in decoder design and implementation. In this thesis, we overlap check and variable node computations to reduce decoding time. Three techniques are discussed, two of which are introduced in this thesis. The techniques are code matrix permutation, matrix space restriction and sub-matrix row-column scheduling. Matrix permutation rearranges the parity-check matrix such that rows and columns that do not have connections in common are separated. This techniques can be applied to any matrix. Its effectiveness largely depends on the structure of the code. We show that its success also depends on the size of row and column weights. Matrix space restriction is another technique that can be applied to any code and has fixed reduction in time or amount of overlap. Its success depends on the amount of restriction and may be traded with performance loss. The third technique already suggested in literature relies on the internal cyclic structure of sub-matrices to achieve overlapping. The technique is limited to LDPC code matrices in which the number of sub-matrices is equal to row and column weights. We show that it can be applied to other codes with a lager number of sub-matrices than code weights. However, in this case maximum overlap is not guaranteed. We calculate the lower bound on the amount of overlapping. Overlapping could be applied to any sub-matrix configuration of quasi-cyclic codes by arbitrarily choosing \nthe starting rows for processing. Overlapping decoding time depends on inter-iteration waiting times. We show that there are upper bounds on waiting times which depend on the code weights. Waiting times could be further reduced by restricting shifts in identity sub-matrices or using smaller sub-matrices. This overlapping technique can reduce the decoding time by up to 50% compared to conventional message and computation scheduling. \nTechniques of matrix permutation and space restriction results in decoder architectures that are flexible in LDPC code design in terms of code weights and size. This is due to the fact that with these techniques, rows and columns are processed in sequential order to achieve overlapping. However, in the existing technique, all sub-matrices have to be processed in parallel to achieve overlapping. Parallel processing of all code sub-matrices requires the architecture to have the number of processing units at least equal to the number sub-matrices. Processing units and memory space should therefore be distributed among the sub-matrices according to the sub-matrices arrangement. This leads to high complexity or inflexibility in the decoder architecture. We propose a simple, programmable and high throughput decoder architecture based on matrix permutation and space restriction techniques.
The original low-density parity-check (LDPC) codes were developed by Robert Gallager in early 1960 and are based on a random parity-check matrix construction. In the mid 1990's it was discovered that LDPC codes could be modified slightly to provide the more powerful error correction. These newer LDPC codes, based on an irregular column weight in the underlying check matrix, were still defined with random construction techniques. The Pi-rotation LDPC codes discovered by Echard are a family of LDPC codes completely defined by a small set of integers and have several symmetrical features that are exploited to build efficient encoding and decoding designs. The Pi-rotation codes can be extended to include irregular matrix patterns to obtain the highest performance. In this dissertation we develop a heuristic algorithm to find the best parity-check matrix for Pi-rotation LDPC codes.
The existing design of quasi-cyclic(QC) low-density parity-check(LDPC) codes has not considered the problems of short length girths and the rows' dependency.The first problem leads to the BER performance of QC LDPC codes to be much poorer than that of randomly constructed LDPC codes,while the second problem leads to the difficulty of construction of generator matrices from parity-check matrices.To solve the first problem,the constraint conditions for designing the QC LDPC codes are proposed,and the dimension and shift factors of the circulant matrices of the given sparse parity-check matrix are adjusted according to the test results of both girth 4 and girth 6.To solve the second problem,an approach of irregular QC LDPC codes is proposed.The proposed approach is to replace some sub-matrices by zero matrices and identity matrices at special positions in the given sparse parity-check matrix so as to get a nonsingular square matrix for the construction of the generator matrix.Though adopting bidiagonal submatrices in parity-check matrix can solve the rows' dependency problem,many code words with low weights will occur,which leads to the BER performance can not be better by increasing code lengths.Examples are provided for the proposed design of QC LDPC codes,and computer simulation results show that the proposed QC LDPC codes achieve good BER performance.
Introduction The construction of binary low-density parity-check (LDPC) codes simply involves replacing a small number of the values in an all-zeros matrix by 1s in such a way that the rows and columns have the required degree distribution. In many cases, randomly allocating the entries in H will produce a reasonable LDPC code. However, the construction of H can affect the performance of the sum–product decoder, significantly so for some codes, and also the implementation complexity of the code. While there is no one recipe for a “good” LDPC code, there are a number of principles that inform the code designer. The first obvious decisions are which degree distribution to choose and how to construct the matrix with the chosen degrees, i.e. pseudo-randomly or with some sort of structure. Whichever construction is chosen, the features to consider include the girth of the Tanner graph and the minimum distance of the code. In this chapter we will discuss those properties of an LDPC code that affect its iterative decoding performance and then present the common construction methods used to produce codes with the preferred properties. Following common practice in the field we will call the selection of the degree distributions for an LDPC code code design and the methods to assign the locations in the parity-check matrix for the 1 entries code construction .
Two classes of well-structured binary low-density parity check codes (LDPC) are described. The first class is based on a branch of combinatorial mathematics, known as the balanced incomplete block design (BIBD). Construction of three types of codes derived from BIBD designs is illustrated in addition to a family of LDPC codes constructed by decomposition of incidence matrices of the proposed BIBD designs. The decomposition technique reduces the density of the parity check matrix and hence reduces the number of short cycles, which generally lead to better performing LDPC codes. The second class of well-structured LDPC codes, Vandermonde or array LDPC codes, are defined by a small number of parameters and cover a large set of code lengths and rates with different column weights. The presented LDPC codes are quasi-cyclic with no cycles of length four; hence simple encoding while maintaining good performance is achieved. Furthermore, the codes are compared with known random LDPC codes, in order to assess their relative achievable performance/complexity trade-offs. It is shown that well-structured LDPC codes perform very similar to the known random LDPC codes.