IEEE Transactions on Applied Superconductivity
A latching-type driver circuit using capacitively-shunted HTS ramp-edge-type junctions
Tsunehiro Hato, N. Harada, Yoshihiro Ishimaru, Akira Yoshida, Naoki Yokoyama
Abstract
We developed a latching-type driver using capacitively shunted high-temperature superconductivity (HTS) junctions for Single-Flux-Quantum (SFQ)-semiconductor output interfaces and fabricated it using ramp-edge-type HTS junctions. Assuming a junction IcRn product of 2 mV, a circuit simulation shows that the driver can produce an output of about 8 mV from an SFQ input pulse with a sufficiently short rise time for an interface clock operation of several gigahertz. HTS junctions were fabricated using the interface engineering method, and capacitors were made from an Indium oxide insulator (the dielectric constant was about 23 at 20 K) sandwiched by YBa/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO) electrodes. The hysteresis of the I-V characteristics of the junctions increased by increasing the area of capacitance. The latching operation of the driver was observed with an output voltage of up to 3 mV.