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IEEE Conference on Nanotechnology (IEEE NANO)

The atomic fabrication of a silicon based quantum computer

Michelle Yvonne Simmons, Steven R. Schofield, Jeremy L. O’Brien, Neil J. Curson, Robert G. Clark, Tilo M. Buehler, Rita P. McKinnon, R. Brenner, D. J. Reilly, Andrew S. Dzurak, A. R. Hamilton

Published Nov 13, 2002• 0 citations
Publisher

Abstract

Presents recent results on two different approaches to realize a solid-state quantum computer based in silicon, using phosphorus atoms as qubits. In the first approach the device is built from the 'bottomup' using a combination of atomic lithography with a scanning tunneling microscope and high quality silicon epitaxial growth using molecular beam epitaxy. In the second approach ion implantation is used to implant the phosphorus atoms from the 'top-down'. In both cases surface control electrodes are fabricated by conventional electron beam lithography. Techniques for qubit read-out utilising coincidence measurements on twin single electron transistors are also presented.

DOI
10.1109/nano.2001.966469

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Presents recent results on two different approaches to realize a solid-state quantum computer based in silicon, using phosphorus atoms as qubits. In the first approach the device is built from the 'bottomup' using a combination of atomic lithography with a scanning tunneling microscope and high quality silicon epitaxial growth using molecular beam epitaxy. In the second approach ion implantation is used to implant the phosphorus atoms from the 'top-down'. In both cases surface control electrodes are fabricated by conventional electron beam lithography. Techniques for qubit read-out utilising coincidence measurements on twin single electron transistors are also presented.
We discuss progress towards the fabrication and demonstration of a prototype silicon-based quantum computer. The devices are based on a precise array of 31P dopants embedded in 28Si. Fabrication is being pursued via two complementary pathways – a ‘top-down’ approach for near-term production of few-qubit demonstration devices and a ‘bottom-up’ approach for large-scale qubit arrays. The ‘top-down’ approach employs ion implantation through a multi-layer resist structure which serves to accurately register the donors to metal control gates and single-electron transistor (SET) read-out devices. In contrast the ‘bottom-up’ approach uses STM lithography and epitaxial silicon overgrowth to construct devices at an atomic scale. Techniques for qubit read-out, which utilise coincidence measurements on novel twin-SET devices, are also presented.
We report a nanofabrication, control and measurement scheme for charge-based silicon quantum computing which utilises a new technique of controlled single ion implantation. Each qubit consists of two phosphorus dopant atoms ~50 nm apart, one of which is singly ionized. The lowest two energy states of the remaining electron form the logical states. Surface electrodes control the qubit using voltage pulses and dual single electron transistors operating near the quantum limit provide fast readout with spurious signal rejection. A low energy (keV) ion beam is used to implant the phosphorus atoms in high-purity Si. Single atom control during the implantation is achieved by monitoring on-chip detector electrodes, integrated within the device structure, while positional accuracy is provided by a nanomachined resist mask. We describe a construction process for implanted single atom and atom cluster devices with all components registered to better than 20 nm, together with electrical characterisation of the readout circuitry. We also discuss universal one- and two-qubit gate operations for this architecture, providing a possible path towards quantum computing in silicon.
The construction of micro- and nano-scale electronic devices that exploit the properties of single atoms have been proposed. A very promising device is a silicon based solid state quantum computer based on an array of single 31P atoms as qubits in a pure 28Si substrate. Operation of the device requires independent control, coupling and readout of the state of individual qubits. We have developed a construction strategy for a few qubit device based on ion implantation of the qubits into prefabricated cells. An ion energy of less than 20 keV is necessary to ensure the ion range is at the required depth in the substrate which is of the order of 20 nm. Single ion impacts are registered by the electrical transient induced in an external circuit. Electron Beam Lithography fabricated cells, containing electrodes of the required nanometre scale, have been implanted with 14 keV 31P ions and the pulse height spectrum of single ion impacts has been successfully recorded. Discrimination on the pulse height allows rejection of ions that suffer unacceptable straggling. This opens the way to the rapid construction of a two qubit device in the first instance that will test many of the essential mechanisms of a revolutionary solid state quantum computer.
The construction of micro- and nano-scale electronic devices that exploit the properties of single atoms have been proposed. A very promising device is a silicon based solid state quantum computer based on an array of single 31P atoms as qubits in a pure 28Si substrate. Operation of the device requires independent control, coupling and readout of the state of individual qubits. We have developed a construction strategy for a few qubit device based on ion implantation of the qubits into prefabricated cells. An ion energy of less than 20 keV is necessary to ensure the ion range is at the required depth in the substrate which is of the order of 20 nm. Single ion impacts are registered by the electrical transient induced in an external circuit. Electron Beam Lithography fabricated cells, containing electrodes of the required nanometre scale, have been implanted with 14 keV 31P ions and the pulse height spectrum of single ion impacts has been successfully recorded. Discrimination on the pulse height allows rejection of ions that suffer unacceptable straggling. This opens the way to the rapid construction of a two qubit device in the first instance that will test many of the essential mechanisms of a revolutionary solid state quantum computer.
Scalable silicon quantum computers will require a material perfection that has never been attempted. Ground state wavefunctions for conduction electrons orbiting individual phosphorous donors must be polarized electronically and coupled to nearest neighbors with great precision. Elimination of all randomizing influences can be achieved only with a fully epitaxial structure; and we believe that output circuitry must also be integrated into the qubit arrays in order to achieve the uniformity needed for large-scale integration. A process that could potentially accomplish this will be outlined, based on scanning tunneling microscope (STM) removal of individual hydrogen atoms from the H-terminated silicon surface followed by phosphine dosing and ultra-low-temperature overgrowth. Self-ordering of PH3 molecules onto extended areas of bare silicon should permit patterning of planar single-electron transistors along with P-donor qubits in the same lithographic step. Initial plans for an experiment to characterize exchange coupling under gate control will be described.
We present a scalable strategy to manufacture quantum computer devices, by encoding quantum information in the combined electron-nuclear spin state of individual ion-implanted phosphorus dopant atoms in silicon. Our strategy allows a typical pitch between quantum bits of order 200 nm, and retains compatibility with the standard fabrication processes adopted in classical CMOS nanoelectronic devices. We theoretically predict fast and high-fidelity quantum logic operations, and present preliminary experimental progress towards the realization of a “flip-flop” qubit system.