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International Journal of Computer Applications

Novel Code Converter Employing Reversible Logic

Rakshith Saligram, T. R. Rakshith

Published Aug 30, 2012• 24 citations
Publisher

Abstract

Quantum computing is one of the emerging fields of technology that has been a guiding light for low power VLSI, low power CMOS design, optical information computing, DNAcomputing, Bio-informatics and Nano-technology .A quantum circuit is a model for quantum computation in which a computation is performed by a sequence of quantum gates, which are reversible transformation on a quantum mechanical analog of an n bit register, referred to as an n-qubit.Code converters are required day in and day out.In this paper, a reversible 5421 to binary code converter is implemented.

DOI
10.5120/8303-1759

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Quantum computing is one of the emerging fields of technology that has been a guiding light for low power VLSI, low power CMOS design, optical information computing, DNAcomputing, Bio-informatics and Nano-technology .A quantum circuit is a model for quantum computation in which a computation is performed by a sequence of quantum gates, which are reversible transformation on a quantum mechanical analog of an n bit register, referred to as an n-qubit.Code converters are required day in and day out.In this paper, a reversible 5421 to binary code converter is implemented.
Energy can neither be created nor be destroyed but it can be conserved. The processors of present day computers are designed using conventional logic circuits which are irreversible in nature. They suffer from loss of information during computation, leading to energy dissipation in the form of heat affecting the performance and life of the circuits. These limitations of conventional logic circuits can be overcome by the reversible logic circuits designed using quantum gates, the essential elements for quantum computing. Quantum computing is an emerging area of research which finds application in optical computing, DNA computing, cryptography, low power CMOS design, digital signal processing and nanotechnology.
Over the last few decades, research in reversible logic has increasingly become very popular and it is gaining greater momentum in the present word. Reversible logic has started finding concert applications in quantum computing, optical computing, nano-technology based system, low-power CMOS design, VLSI design. The principal objective of this work is to argue for quantum implementation of various reversible logic gates by using C-NOT, Controlled-V and Controlled-V+ gates. The present work presents Binary coded decimal adder (BCD) in terms of number of gates, garbage outputs, quantum cost, delay and hardware complexity compared to existing design.
Recent applications of quantum computing is the design and evaluations on the reversible logic technology. The digital systems widely utilize the code conversion technology in enhancing the data security and also minimize the required hardware. This nano-metric technology is high prolific in digital systems as it minimize the power consumption in logic circuits. This paper proposes the reversible logic design for such a code conversion including the binary to gray code, gray to binary code, BCD to excess 3 codes, excess 3 to BCD code.
Abstract Reversible gates have been one of the emerging research areas in these days. The reversible gates have several applications in the fields of low power CMOS, DNA computing, optical, nanotechnology etc. Quantum computing is one of the fastest and upcoming nanotechnologies that can implement the digital logical circuits using reversible logic gates. In this paper, CNOT, TOFFOLI, FREDKIN and PERES reversible logic gates have been implemented on IBM quantum computer. An efficient one-bit full adder is going to be proposed using the reversible gates like CNOT and TOFFOLI. Later, a 4x4 multiplier will be developed using the proposed one-bit full adder. The proposed multiplier is proved to perform faster calculations compared to the earlier multipliers. The simulation of the presented modules will be done on IBM Quantum computer and the respective probabilities can be observed for different inputs.
Quantum mechanics is the revolution in thinking of the 20th century and will be the revolution in various applications in the 21st century. The world's powers-that-be each have their own particular or common quantum plans to access these new technologies. Indeed, emerging quantum computing technologies are poised to replace classical binary logic. The development of new integrated operators, on subatomic circuits, will benefit from an exponential reduction in size, power consumption and fantastic computing capacity. Indeed, the quantum circuit is proving day by day a very high level of numerical computation disrupting communication, encryption and modelling algorithms. However, what about the reversibility of quantum operators in order to adapt them to our already widely used classical computers?Current design flows will be challenged at various levels both in terms of computer-aided design (CAD) methods and in all major aspects of quantum computing circuit design, including logic synthesis, simulation, verification and testing. On the other hand, quantum technology remains dependent on access to integrated photonics and probably on the integration of algorithms in hyper-flexible photon electron hardware. Our paper intends to present the possibility of designing classical operators based on quantum operators in order to explain and explore the mixed Qbit-Bit Using the IBM simulator, to analyse their functions, to design new electronic functions and to implement them in quantum circuits.
Reversible logic; transforms logic signal in a way that allows the original input signals to be recovered from the produced outputs, has attracted great attention because of its application in diverse areas such as quantum computing, low power computing, nanotechnology, DNA computing, quantum dot cellular automata, optical computing. In this paper, we design low power binary comparators using reversible logic gates. Firstly, single bit binary reversible comparator circuits are designed using different reversible gates along with proposed gate named Newly Proposed Gate. Then, these procedures are generalized for constructing binary n-bit reversible comparator circuit. The design synthesis consists of two parts: Comparator Cell and Propagator Cell. An algorithm, based on our proposed design, shows that proposed circuit reduces overall cost and it outperforms than existing sequential comparator circuits. Also, comparing with existing tree-based comparator circuit, proposed design reduces quantum cost, garbage output and gate count in a significance level which means better improvement as cost of any quantum circuit is directly associated with quantum cost, garbage output and gate count.