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IEEE Transactions on Applied Superconductivity

A proposal of Josephson binary-to-ternary converter

Fuqiang Li, Michitada Morisue, T. Ogata

Published Jun 1, 1995• 6 citations
Publisher

Abstract

This paper presents a novel Josephson converter to perform signal conversion from a binary system to a ternary system. Most converters perform conversion in successive steps from the least significant bit to the most significant bit. Therefore, the circuits become complicated and operation speed becomes low. In order to overcome these shortcomings, a novel converter based on Josephson technology is proposed. The principle of the converter is described in detail and simulation results for an 8-bit converter are illustrated. The advantages of this converter are simple construction with a small number of elements and high speed operation.>

DOI
10.1109/77.403130

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A novel complementary ternary logic circuit using Josephson junctions as switching gates is described. The principle of the circuit is based on the tristate of a Josephson junction, that is the state of switching in either positive direction or negative direction, in addition to the state of no switching. The JCTL is constructed of two SQUIDs (superconducting quantum interference devices), one of which is switched in the positive directions and the other in the negative direction. The JCTL can perform the fundamental operations of AND, OR, and NOT in ternary form and can function as a full adder if the voltage-current characteristics of the two SQUIDs are adjusted appropriately. The advantage of the JCTL is its higher speed of operation with higher density than the conventional Josephson binary logic circuit. The principle of operation is described in detail, and simulation results are presented.>
A novel Josephson complementary ternary logic (JCTL) circuit is described. This fundamental circuit is based on the combination of two SQUIDs (superconducting quantum interference devices), one of which is switched in the positive direction and the other in the negative direction. The JCTL can perform the fundamental operations of AND, OR, NOT, and Double NOT in ternary form. The principle of the operation and design criteria are described in detail. Simulation results show that reliable operation of these circuits can be achieved with a high performance.>
This work addresses new signal processing circuits using the special features of superconductivity. A novel flash-type analog-to-digital converter based on a comparator invented in the preceding contract period was demonstrated. The comparator was shown to be useful as a logic gate and an encoder was designed with it. A high-resolution delta-sigma analog-to-digital converter was devised with superconductive components in spite of the lack of an analog integrator in this technology. Positive theoretical results are being followed up experimentally. A simple flux-shuttle single-flux-quantum shift register was devised and several different readout schemes were studied. A six- bit-long version was successfully tested at 1 GHz. A decoder that takes in a five-bit word to select one of 32 output lines was completed. The design involved very tight limitations on current and power. The decoder was combined with a serial-to-parallel converter and operated at 2 GHz. A study of the appropriate architectures for various types of superconductive or Josephson digital technology was developed: an inductance-extraction program.
Ternary quantum circuits play a significant role in future quantum computing technology because they have many advantages over binary quantum circuits. Subtraction is considered as being one of the key arithmetic operations; hence, subtractors are very essential for the construction of various computational units of quantum computers and other complex computational systems. In this paper, we have proposed the realization of a quantum reversible ternary half-subtractor circuit using a generalized ternary gate, a ternary Toffoli gate, and a ternary C2NOT gate. Based on the realization of the ternary half-subtractor, we proposed the realization of a ternary full-subtractor.
A fast Josephson circuit using a threshold logic is developed for application to a multiplier and a binary counter. The former is a typical combinational circuit and the latter is a typical sequential circuit. The junction and barrier materials used were Nb-AlO/SUB X/-Nb. An optimized asymmetric two-junction interferometer maximized the operating margin of the threshold gate. A speed-up junction was introduced to decrease the switching delay without sacrificing the operating margin. A dumping resistor, which was inserted parallel to the input signal line of the threshold gate between its two terminals, decreased the reflection of the input signal caused by the gate inductance, thereby ensuring the margin and speed. To demonstrate the high-speed possibility of the Josephson threshold logic, a high-speed experiment for the circuits was performed. The multiplier demonstrated 210-ps operation.