A novel complementary-metal-oxide-semiconductor (CMOS) processor labelled quantum-circuit processor (QCP) for the high-performance emulation of quantum computing is presented. The QCP performs the emulation of the calculation performed in the quantum circuit by simple matrix calculations based on single-instruction-stream-multiple-data-stream (SIMD) parallel processing. Using the parallel operation of an enormous number of devices in LSI, it executes quantum algorithms at a speed comparable to that of the quantum computer. A 5-qubit processor was implemented using a programmable logic device (PLD), and the quantum Fourier transformation was demonstrated by this processor.
A novel complementary-metal-oxide-semiconductor (CMOS) processor labelled quantum-circuit processor (QCP) for the high-performance emulation of quantum computing is presented. The QCP performs the emulation of the calculation performed in the quantum circuit by simple matrix calculations based on single-instruction-stream-multiple-data-stream (SIMD) parallel processing. Using the parallel operation of an enormous number of devices in LSI, it executes quantum algorithms at a speed comparable to that of the quantum computer. A 5-qubit processor was implemented using a programmable logic device (PLD), and the quantum Fourier transformation was demonstrated by this processor.
Quantum-circuit processor (QCP) is a parallel processor that executes quantum algorithms at a processing speed comparable to a quantum computer. The QCP emulates the quantum superposition, utilizing massive silicon devices in the fractal hardware-architecture. Its design cost is relaxed due to that recursive structure although a huge amount of devices are required for it. In this paper, 8-qubit QCP was fabricated within a programmable logic device. This is the first realization of the 8-qubit-hardware quantum computing as far as we know. A factoring algorithm is demonstrated by using it in this paper.
Controlling and programming quantum devices to process quantum information by the unit of qudit shows great potential to enhance the capabilities of qubit-based quantum technologies. Here, we report a programmable qudit-based quantum processor in silicon-photonic integrated circuits and demonstrate its enhancement of quantum computational parallelism. The processor monolithically integrates all the key functionalities and capabilities of initialisation, manipulation, and measurement of the two-ququart states and multi-value quantum-controlled logic gates with high-level fidelities. We implemented the basic quantum Fourier transform algorithms to benchmark the enhancement of quantum parallelism using qudits, allowing the implementations of more than one million high-fidelity preparations, operations and projections of qudit states in the processor. Our work shows an integrated quantum technology for qudit-based quantum computing with enhanced capacity, accuracy, and efficiency.
Quantum computers are regarded as the future of computing, as they are believed to be capable of solving extremely complex problems that are intractable on conventional digital computers. However, near-term quantum computers are prone to a plethora of noise sources that are difficult to mitigate, possibly limiting their scalability and precluding us from running any useful algorithms. Quantum emulation is an alternative approach that uses classical analog hardware to emulate the properties of superposition and entanglement, thereby mimicking quantum parallelism to attain similar speeds. By contrast, the use of classical digital hardware, such as field programmable gate arrays (FPGA), is less inefficient at emulating a quantum computer, as it does not take advantage of the fundamentally analog nature of quantum states. Consequently, this approach adds an inherent hardware overhead that also prevents scaling. In this work, an energy-efficient quantum emulator based on analog circuits realized in UMC 180-nm CMOS technology is proposed along with the design methodologies for a scalable computing architecture. A six-fold improvement in power consumption was observed over the FPGA-based approach for a ten-qubit emulation of Grover's search algorithm. The proposed emulator is also about 400 times faster than a Ryzen 5600x six-core processor performing a simulation of six-qubit Grover's search algorithm
Abstract The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications1. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)2. When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’3–6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots7–9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm10, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.
Quantum computing is regarded as the future of computing that hopefully provides exponentially large processing power compared to the conventional digital computing. However, current quantum computers do not have the capability to correct errors caused by environmental noise, so that it is difficult to run useful algorithms that require deep quantum circuits. Therefore, emulation of quantum circuits in digital computers is essential. However, emulation of large quantum circuits requires enormous amount of computations, and leads to a very large processing time. To reduce the processing time, we propose an FPGA emulator with high-bandwidth-memory to emulate quantum Fourier transform (QFT), which is a major part of many quantum algorithms. The proposed FPGA emulator is scalable in terms of both processing speed and the number of qubits, and extendable to multiple FPGAs. We performed QFT emulations up to 30 qubits using two FPGAs. According to the measured results, we have achieved 23.6 ~ 24.5 times speed-up compared to a fully optimized 24-core CPU emulator.
Recent advances in quantum error correction codes for fault-tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.