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Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Error codes applied to optical algebraic processors

Scott A. Ellett, John F. Walkup, Thomas F. Krile

Published Nov 1, 1991• 1 citation
Publisher

Abstract

Optical algebraic processors can perform complex calculations in parallel and at high speeds. However, they commonly suffer from a low analog accuracy which hinders their widespread application. Error detection and correction codes provide one technique for improving the accuracy of optical algebraic processors. The use of these codes would allow some of the errors that may occur during a computation to be detected and possibly corrected. This paper describes the results of various computer simulations of optical matrix-vector multipliers employing error-correction codes. It discusses the application of convolutional codes to optical matrix-vector multipliers along with several block codes. Both binary and nonbinary codes are considered. The results indicate that a significant improvement in performance can be obtained when compared with processors not employing error-correction codes. Also, the type of noise, whether signal-independent or signal-dependent noise, has a significant effect on the performance of a matrix-vector multiplier employing an error code. The encoding and decoding operations required for the error codes can be performed optically.

DOI
10.1117/12.49747

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Optical algebraic processors can perform complex calculations in parallel and at high speeds. However, they commonly suffer from a low analog accuracy which hinders their widespread application. Error detection and correction codes provide one technique for improving the accuracy of optical algebraic processors. The use of these codes would allow some of the errors that may occur during a computation to be detected and possibly corrected. This paper describes the results of various computer simulations of optical matrix-vector multipliers employing error-correction codes. It discusses the application of convolutional codes to optical matrix-vector multipliers along with several block codes. Both binary and nonbinary codes are considered. The results indicate that a significant improvement in performance can be obtained when compared with processors not employing error-correction codes. Also, the type of noise, whether signal-independent or signal-dependent noise, has a significant effect on the performance of a matrix-vector multiplier employing an error code. The encoding and decoding operations required for the error codes can be performed optically.
Optical algebraic processors can perform complex calculations in parallel and at high speeds. However, they commonly suffer from a low analog accuracy which hinders their widespread application. Error detection and correction codes provide one technique for improving the accuracy of optical algebraic processors. The use of these codes would allow some of the errors that may occur during a computation to be detected and possibly corrected. This paper describes the results of various computer simulations of optical matrix-vector multipliers employing error-correction codes. It discusses the application of convolutional codes to optical matrix-vector multipliers along with several block codes. Both binary and nonbinary codes are not employing error-correction codes. Also, the type of noise, whether signal-independent or signal-dependent, has a significant effect on the performance of a matrix-vector multiplier employing an error code. The encoding and decoding operations required for the error codes can be performed optically.
Optical processors can perform complex calculations in parallel at high speeds. They commonly suffer, however, from low accuracy, which currently hinders their widespread use. Various models for the noise in optical processors have been developed.1 In addition, various techniques have been developed to improve their accuracy. One technique involves the use of error-detection and correction codes to improve the accuracy of optical linear algebra processors.2 This allows some of the errors that occur during computation to be detected and possibly corrected. These codes, developed earlier for data transmission and fault tolerance in electronic processors, can thus be used to improve accuracy. Many of the required encoding and decoding operations can be performed optically. Computer simulations of optical matrix-vector multipliers employing various error codes will be presented. They indicate that a significant improvement in accuracy can be obtained when they are compared with processors not employing error codes.
Optical matrix-vector multipliers are known to suffer from low computational accuracy which is the major drawback preventing them from becoming a practical force in real world applications. Error-correction coding is one technique proposed to overcome this problem of low level accuracy. In this thesis, the effects of the application of multiple error-correction codes to optical matrix-vector multipliers are studied. For this purpose, many different cases were simulated on a computer. Noting that an optical matrix-vector multiplier performs the product y = Ax, basically four cases were considered; signal independent and signal dependent noise in the matrix A, and signal independent and signal dependent noise in the vector x. Two different error-correcting codes were simulated; one being a binary, multiple error-correcting BCH code and other being a non-binary, multiple error-correcting Reed-Solomon code, which is basically an extension of the binary BCH code. The advantages and disadvantages of switching from binary BCH codes to non-binary Reed-Solomon codes were investigated. Based on the results obtained from the simulations, the conditions under which the use of error-correction coding is feasible in optical matrix-vector multipliers are discussed.
Many disciplines, such as antenna beam-forming and \nadaptive optics, require the ability to perform high \nspeed matrix operations, which often can be reduced to a \nseries of matrix-vector products. Analog optical matrixvector \nprocessors (OMVP's) take advantage of the high \nspeed and parallelism of optics to rapidly compute \nmatrix-vector products. However, OMVP's suffer from a \nlow accuracy which currently hinders their widespread \napplication. Over the past decade, various techniques \nhave been introduced to achieve high accuracy computation \nwith OMVP's. This dissertation studies the application \nof error-correcting codes (ECC's) and the union of ECC's \nwith digital partitioning to achieve high accuracy computation. \nThe ability of ECC's to improve the performance \nof OMVP's is studied through the use of computer simulations. \nThe effect ECC's have on system throughput is \nalso studied. Digital partitioning is a new technique \nfor achieving high accuracy computations on analog \nOMVP's. One potential drawback of digital partitioning \nis its sensitivity to errors. Error-correcting codes can \nenhance the performance of the digital partitioning algorithm \nby reducing this sensitivity to errors. Computer \nsimulation results are presented showing the benefits of \nusing ECC's with digital partitioning. In addition, an \nanalysis of the time requirements for encoding and decoding \nthe ECC's and the effect on system throughput is \npresented.
The development of quantum computers requires not only experimental advances, but also theoretical efforts to tackle the bottlenecks and identify potential applications. This thesis addresses some essential elements in each stage of the development of quantum computers, from the currently available hardware to the long-term devices. The critical factor that hinders the quantum hardware from performing perfect operations is the presence of noise, however, it can be overcome by error correction codes. We first consider a large-scale quantum processor with asymmetrical noise and preferably a modular structure. By concatenating the surface code with an error-detecting code, and utilising the information from detection with a customised decoder, we find very high thresholds for the designed devices. The second topic is small error correction codes which are more realistic to be implemented in the near future. A measure `integrity' is introduced to benchmark the performance of quantum memories to demonstrate beneficial error correction, associated with four milestones. We show integrity is closely related with other commonly-used measures and can be easily assessed by experimentalists. This framework is then studied in detail in the context of an ion-trap quantum device implemented with the seven qubit code. We present a protocol based on detailed sequences of crystal-reconfiguration operations and stabiliser mappings to perform a full error correction cycle. Realistic error models and parameters from reported works are also given. While experimental efforts continue to battle against the noise, some hybrid quantum-classical algorithms have been developed to be implemented on the near-term noisy devices. The variational algorithm is one of the hybrid algorithms that have been widely applied to simulations of condensed matter physics and quantum chemistry. In the next chapter, we introduce a variational quantum compiler to automatically search for the encoding circuits of small error correction codes. By tailoring the ansatz to optimise the circuit for particular hardware systems, we show some novel circuits discovered with the compiler. The final chapter applies the variational algorithm to solve linear algebra problems including linear systems of equations and matrix-vector multiplications. We show that the linear algebra problems can be solved with near-term devices, with circuit depth linear to the condition number and super-linear to the number of qubits.
Information theory shows that one can communicate with arbitrarily low error probability over a noisy channel. By recognizing that some types of computations can be cast as communications problems, it may be possible to compute accurately with an inexact processor. Traditional analog optical processors, for example, offer advantages of parallelism and speed but suffer from significant inaccuracies. We propose an algorithm whereby the accuracy of matched filter processors can be improved significantly at the cost of a modest increase in computational resources. Errors that are due to noisy data and/or inexact computing can be detected and in some cases corrected.