The development of quantum computers requires not only experimental advances, but also theoretical efforts to tackle the bottlenecks and identify potential applications. This thesis addresses some essential elements in each stage of the development of quantum computers, from the currently available hardware to the long-term devices. The critical factor that hinders the quantum hardware from performing perfect operations is the presence of noise, however, it can be overcome by error correction codes. We first consider a large-scale quantum processor with asymmetrical noise and preferably a modular structure. By concatenating the surface code with an error-detecting code, and utilising the information from detection with a customised decoder, we find very high thresholds for the designed devices. The second topic is small error correction codes which are more realistic to be implemented in the near future. A measure `integrity' is introduced to benchmark the performance of quantum memories to demonstrate beneficial error correction, associated with four milestones. We show integrity is closely related with other commonly-used measures and can be easily assessed by experimentalists. This framework is then studied in detail in the context of an ion-trap quantum device implemented with the seven qubit code. We present a protocol based on detailed sequences of crystal-reconfiguration operations and stabiliser mappings to perform a full error correction cycle. Realistic error models and parameters from reported works are also given. While experimental efforts continue to battle against the noise, some hybrid quantum-classical algorithms have been developed to be implemented on the near-term noisy devices. The variational algorithm is one of the hybrid algorithms that have been widely applied to simulations of condensed matter physics and quantum chemistry. In the next chapter, we introduce a variational quantum compiler to automatically search for the encoding circuits of small error correction codes. By tailoring the ansatz to optimise the circuit for particular hardware systems, we show some novel circuits discovered with the compiler. The final chapter applies the variational algorithm to solve linear algebra problems including linear systems of equations and matrix-vector multiplications. We show that the linear algebra problems can be solved with near-term devices, with circuit depth linear to the condition number and super-linear to the number of qubits.
The development of quantum computers requires not only experimental advances, but also theoretical efforts to tackle the bottlenecks and identify potential applications. This thesis addresses some essential elements in each stage of the development of quantum computers, from the currently available hardware to the long-term devices. The critical factor that hinders the quantum hardware from performing perfect operations is the presence of noise, however, it can be overcome by error correction codes. We first consider a large-scale quantum processor with asymmetrical noise and preferably a modular structure. By concatenating the surface code with an error-detecting code, and utilising the information from detection with a customised decoder, we find very high thresholds for the designed devices. The second topic is small error correction codes which are more realistic to be implemented in the near future. A measure `integrity' is introduced to benchmark the performance of quantum memories to demonstrate beneficial error correction, associated with four milestones. We show integrity is closely related with other commonly-used measures and can be easily assessed by experimentalists. This framework is then studied in detail in the context of an ion-trap quantum device implemented with the seven qubit code. We present a protocol based on detailed sequences of crystal-reconfiguration operations and stabiliser mappings to perform a full error correction cycle. Realistic error models and parameters from reported works are also given. While experimental efforts continue to battle against the noise, some hybrid quantum-classical algorithms have been developed to be implemented on the near-term noisy devices. The variational algorithm is one of the hybrid algorithms that have been widely applied to simulations of condensed matter physics and quantum chemistry. In the next chapter, we introduce a variational quantum compiler to automatically search for the encoding circuits of small error correction codes. By tailoring the ansatz to optimise the circuit for particular hardware systems, we show some novel circuits discovered with the compiler. The final chapter applies the variational algorithm to solve linear algebra problems including linear systems of equations and matrix-vector multiplications. We show that the linear algebra problems can be solved with near-term devices, with circuit depth linear to the condition number and super-linear to the number of qubits.
Quantum computers promise to solve computational problems that are inaccessible to classical machines. The reliable execution of large-scale quantum algorithms requires robust operations in the presence of noise. Quantum error correction addresses this challenge by encoding quantum information redundantly across several physical qubits, such that errors can be detected and corrected during a computation. However, no single error-correcting code intrinsically supports an inherently robust, fault-tolerant implementation of all gates needed for universal quantum computing. Moreover, most modern approaches to both quantum error correction and the implementation of universal logical operations on encoded qubits rely on mid-circuit measurements and feed-forward control. These types of operations are technologically demanding, often slow, and prone to high error rates, and they limit the overall success probability of quantum algorithms. In this thesis, we develop fault-tolerant protocols and circuits for quantum error correction and universal logical computation, with an emphasis on implementations compatible with current hardware systems. We first focus on fault-tolerant quantum error correction on small codes. By comparing different protocols, we identify trade-offs between compact circuit constructions and their robustness to noise. We then assess their practical performance by comparing numerical simulations of noisy circuits with experimental data. Beyond the preservation of encoded information, we study how universal logic can be implemented in a fault-tolerant manner on encoded qubits. A central approach considered in this thesis is code switching, in which logical information is transferred between two distinct error-correcting codes that support complementary sets of inherently fault-tolerant logical gates. In combination, these codes give access to a complete universal fault-tolerant logical gate set. In this thesis, we determine conditions that allow us to construct fault-tolerant protocols for code switching. We adapt these protocols to the capabilities of current hardware, thereby enabling the first experimental realization of universal fault-tolerant logic by means of code switching. However, the overall performance of these schemes is limited by slow and noisy mid-circuit measurements. To address this bottleneck, we construct a suite of measurement-free fault-tolerant universal operations that do not require any measurements during the execution of an algorithm. In this framework, error correction and logical operations are implemented coherently as part of the quantum circuit, without mid-circuit measurements or in-sequence classical control. We introduce measurement-free code-switching schemes that can be scaled to arbitrary code distances through concatenation, and which thereby provide, in principle, arbitrarily strong error suppression. We further tailor our approach to the capabilities of current trapped-ion quantum processors. New circuit constructions support the first experimental implementation of a logical quantum algorithm without mid-circuit measurements, demonstrated through Grover's search on three encoded qubits. Together, the results of this thesis expand the toolbox for early fault-tolerant quantum computation. They show how protocols for quantum error correction and universal logical gates can be designed without mid-circuit measurements with realistic hardware constraints in mind, opening new pathways towards universal quantum logic.
Quantum computing has the potential to transform information technology by offering algorithms for certain tasks, such as quantum simulation, that are vastly more efficient than what is possible with any classical device. But experimentally implementing practical quantum information processing is a very difficult task. Here we study two important, and closely related, aspects of this challenge: architectures for quantum computing, and quantum error correction Exquisite quantum control has now been achieved in small ion traps, in nitrogen-vacancy centres and in superconducting qubit clusters, but the challenge remains of how to scale these systems to build practical quantum devices. In Part I of this thesis we analyse one approach to building a scalable quantum computer by networking together many simple processor cells, thus avoiding the need to create a single complex structure. The difficulty is that realistic quantum links are very error prone. Here we describe a method by which even these error-prone cells can perform quantum error correction. Groups of cells generate and purify shared resource states, which then enable stabilization of topologically encoded data. Given a realistically noisy network (10% error rate) we find that our protocol can succeed provided that all intra-cell error rates are below 0.8%. Furthermore, we show that with some adjustments, the protocols we employ can be made robust also against high levels of loss in the network interconnects. We go on to analyse the potential running speed of such a device. Using levels of fidelity that are either already achievable in experimental systems, or will be in the near-future, we find that employing a surface code approach in a highly noisy and lossy network architecture can result in kilohertz computer clock speeds. In Part II we consider the question of quantum error correction beyond the surface code. We consider several families of topological codes, and determine the minimum requirements to demonstrate proof-of-principle error suppression in each type of code. A particularly promising code is the gauge color code, which admits a universal transversal gate set. Furthermore, a recent result of Bombin shows the gauge color code supports an error-correction protocol that achieves tolerance to noisy measurements without the need for repeated measurements, so called single-shot error correction. Here, we demonstrate the promise of single-shot error correction by designing a decoder and investigating its performance. We simulate fault-tolerant error correction with the gauge color code, and estimate a sustainable error rate, i.e. the threshold for the long time limit, of ~0.31% for a phenomenological noise model using a simple decoding algorithm.
Traditional quantum algorithms with guaranteed performance generally require fully coherent quantum computers to operate, making error-correction a necessity. In contrast, variational quantum algorithms seek to remove this requirement by formulating the computation as the approximate optimization of a functional. This optimization is carried out in the space of heuristic functions defined by a parameterized (variational) quantum circuit. Taking advantage of the flexibility in the definition of these heuristics, we can expand the operability of variational algorithms within the regime of coherence times of noisy intermediate-scale quantum devices, avoiding the necessity of error-correction. In this dissertation, we present the application of the variational quantum computing approach to problems in quantum simulation, quantum state preparation, quantum error-correction, and generative modeling.\nIn the first part, we investigate the use of the variational quantum eigensolver (VQE) for simulating the ground state of fermionic systems. We start by studying the implementation of VQE using the unitary coupled cluster (UCC) ansatz and propose strategies to reduce its cost. We use these insights to carry out some of the first experimental quantum computations of molecular energies using simplified versions of this ansatz. We also propose an extension of UCC to study problems in condensed matter physics, along with a new low-depth circuit ansatz for preparing non-gaussian fermionic states on quantum computers. We show the potential of our approach to describe strongly correlated fermionic systems.\nIn the second part, we develop three new variational quantum algorithms for problems in quantum computing and machine learning, namely: 1) the quantum autoencoder, to compress ensembles of quantum states, 2) the variational quantum error corrector, to find device-tailored quantum encoding and recovery circuits for quantum error correction, and 3) the variational quantum generator, to generate classical probability distributions. These techniques offer efficient ways to design new quantum circuits for state preparation, to find more effective error-correcting codes and to perform generative modeling with quantum computers. Our work provides insights into the design of variational quantum algorithms and establishes practical guidelines to implement these methods on near-term quantum computers, as well as some future research directions for this field.
Quantum computers promise huge speed-up over conventional computers in crucial problems like chemistry and materials simulations, decryption, and even machine learning. However, any imperfect manipulations of the qubits from which the machines are formed and any interactions with the environment can lead to errors and loss of their quantum properties. This thesis will develop practical schemes for fighting such errors in the quantum hardware and discuss possible applications of such noisy machines. We can protect the quantum information against noise by employing additional qubits and performing quantum error correction, whose experimental implementation has been brought much closer to reality via the recent rapid advance of quantum hardware, but challenges still remain. One example is coherent errors, which can grow much faster than regular errors. In this thesis, we tackle it by improving upon the conventional scheme that transforms it into regular errors using twirling, and also by developing a new scheme called Pauli conjugation that makes use of its coherent properties to our advantage. Implementations of quantum error correction codes also bring about hardware challenges like wiring packing and leakage errors. For the silicon spin qubit platform, these can be overcome by a surface code architecture we develop. It is challenging to use quantum error correction for the applications of near- term quantum hardware due to the constrained qubit count. Instead, we rely on quantum error mitigation to fight noise, which makes use of extra measurements instead of extra qubits. The Fermi-Hubbard variational quantum eigensolver is one of the most promising near-term quantum algorithms, thus we have performed a resource estimation for the task to gauge its feasibility. We then improve and combine the existing error mitigation schemes to boost their performance and thus to enhance the feasibility of near-term quantum algorithms, bringing practical applications of quantum hardware closer to reality.
Universal fault-tolerant quantum computers will require error-free execution of long sequences of quantum gate operations, which is expected to involve millions of physical qubits. Before the full power of such machines will be available, near-term quantum devices will provide several hundred qubits and limited error correction. Still, there is a realistic prospect to run useful algorithms within the limited circuit depth of such devices. Particularly promising are optimization algorithms that follow a hybrid approach: the aim is to steer a highly entangled state on a quantum system to a target state that minimizes a cost function via variation of some gate parameters. This variational approach can be used both for classical optimization problems as well as for problems in quantum chemistry. The challenge is to converge to the target state given the limited coherence time and connectivity of the qubits. In this context, the quantum volume as a metric to compare the power of near-term quantum devices is discussed. With focus on chemistry applications, a general description of variational algorithms is provided and the mapping from fermions to qubits is explained. Coupled-cluster and heuristic trial wave-functions are considered for efficiently finding molecular ground states. Furthermore, simple error-mitigation schemes are introduced that could improve the accuracy of determining ground-state energies. Advancing these techniques may lead to near-term demonstrations of useful quantum computation with systems containing several hundred qubits.
Quantum error correction codes are essential for fault-tolerant quantum computing. They are a method of detecting and correcting errors in a quantum computer by encoding logical qubits across multiple physical qubits. Several prominent error correction codes have been developed and larger and more complex codes are being developed continuously. However, evaluating the fault-tolerance of these larger codes is becoming exponentially more complicated. While conventional methods of proving and evaluating the fault-tolerance of these circuits have worked thus far, they are soon to be obsolete. The aim of this thesis is to develop a framework that automatically evaluates the fault-tolerance of a quantum error correction circuit across different hardware architectures. The framework works as follows: it takes a noiseless quantum error correction code; injects hardware-realistic noise into it; and evaluates the fault-tolerance of the resulting noisy circuit by estimating its logical error rate through Monte Carlo sampling. For the injection of hardware-realistic noise, this thesis considers noise stemming from five different quantum computing hardware architectures: superconducting qubits, neutral atoms, trapped ions, photonic qubits, and spin qubits. The noise model was constructed by extracting single-qubit gate, two-qubit gate and measurement error fidelities from current experimental literature. The noise model and circuit generation is implemented in Python, circuit representation and noise injection is executed in Stim and decoding and estimating the logical error rate is achieved through PyMatching. The framework is evaluated on the repetition code, the surface code, and the color code; the logical error rate is estimated across all five hardware architectures under the noise model; and the results are discussed in the context of hardware compatibility for the given codes.